v_hdmiphy1
Xilinx SDK Drivers API Documentation
xhdmiphy1_hdmi.h File Reference

Overview

The Xilinx HDMI PHY (HDMIPHY) driver.

This driver supports the Xilinx HDMI PHY IP core.

Note
None.
MODIFICATION HISTORY:
Ver   Who  Date     Changes


dd/mm/yy


1.0 gm 10/12/18 Initial release.

Functions

void XHdmiphy1_ClkDetEnable (XHdmiphy1 *InstancePtr, u8 Enable)
 This function enables the HDMIPHY's detector peripheral. More...
 
void XHdmiphy1_ClkDetTimerClear (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir)
 This function clears the clock detector TX/RX timer. More...
 
void XHdmiphy1_ClkDetSetFreqLockThreshold (XHdmiphy1 *InstancePtr, u16 ThresholdVal)
 This function sets the clock detector frequency lock counter threshold value. More...
 
u8 XHdmiphy1_ClkDetCheckFreqZero (XHdmiphy1 *InstancePtr, XHdmiphy1_DirectionType Dir)
 This function checks clock detector RX/TX frequency zero indicator bit. More...
 
void XHdmiphy1_ClkDetSetFreqTimeout (XHdmiphy1 *InstancePtr, u32 TimeoutVal)
 This function sets clock detector frequency lock counter threshold value. More...
 
void XHdmiphy1_ClkDetTimerLoad (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u32 TimeoutVal)
 This function loads the timer to TX/RX in the clock detector. More...
 
void XHdmiphy1_DruReset (XHdmiphy1 *InstancePtr, XHdmiphy1_ChannelId ChId, u8 Reset)
 This function resets the DRU in the HDMIPHY. More...
 
void XHdmiphy1_DruEnable (XHdmiphy1 *InstancePtr, XHdmiphy1_ChannelId ChId, u8 Enable)
 This function enabled/disables the DRU in the HDMIPHY. More...
 
u16 XHdmiphy1_DruGetVersion (XHdmiphy1 *InstancePtr)
 This function gets the DRU version. More...
 
void XHdmiphy1_DruSetCenterFreqHz (XHdmiphy1 *InstancePtr, XHdmiphy1_ChannelId ChId, u64 CenterFreqHz)
 This function sets the DRU center frequency. More...
 
u64 XHdmiphy1_DruCalcCenterFreqHz (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId)
 This function calculates the center frequency value for the DRU. More...
 
void XHdmiphy1_HdmiGtDruModeEnable (XHdmiphy1 *InstancePtr, u8 Enable)
 This function sets the GT RX CDR and Equalization for DRU mode. More...
 
void XHdmiphy1_PatgenSetRatio (XHdmiphy1 *InstancePtr, u8 QuadId, u64 TxLineRate)
 This function sets the Pattern Generator for the GT Channel 4 when it is used to generate the TX TMDS Clock. More...
 
void XHdmiphy1_PatgenEnable (XHdmiphy1 *InstancePtr, u8 QuadId, u8 Enable)
 This function enables or disables the Pattern Generator for the GT Channel 4 when it isused to generate the TX TMDS Clock. More...
 
void XHdmiphy1_HdmiIntrHandlerCallbackInit (XHdmiphy1 *InstancePtr)
 This function sets the appropriate HDMI interupt handlers. More...