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Xilinx SDK Drivers API Documentation
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This typedef contains the attributes for Tile DMA BD Control word register. More...
Data Fields | |
XAieGbl_RegFldAttr | Valid |
Valid bit field attributes. More... | |
XAieGbl_RegFldAttr | Ab |
AB mode bit field attributes. More... | |
XAieGbl_RegFldAttr | Fifo |
FIFO mode bit field attributes. More... | |
XAieGbl_RegFldAttr | Pkt |
Packet mode bit field attributes. More... | |
XAieGbl_RegFldAttr | Intlv |
Interleave mode bit field attributes. More... | |
XAieGbl_RegFldAttr | Cnt |
Interleave count bit field attributes. More... | |
XAieGbl_RegFldAttr | NexEn |
Next BD enable bit field attributes. More... | |
XAieGbl_RegFldAttr | NexBd |
Next BD bit field attributes. More... | |
XAieGbl_RegFldAttr | Len |
Length bit field attributes. More... | |
This typedef contains the attributes for Tile DMA BD Control word register.
XAieGbl_RegFldAttr XAieGbl_RegTileBdCtrl::Ab |
AB mode bit field attributes.
Referenced by XAieDma_TileBdWrite().
XAieGbl_RegFldAttr XAieGbl_RegTileBdCtrl::Cnt |
Interleave count bit field attributes.
Referenced by XAieDma_TileBdWrite().
XAieGbl_RegFldAttr XAieGbl_RegTileBdCtrl::Fifo |
FIFO mode bit field attributes.
Referenced by XAieDma_TileBdWrite().
XAieGbl_RegFldAttr XAieGbl_RegTileBdCtrl::Intlv |
Interleave mode bit field attributes.
Referenced by XAieDma_TileBdWrite().
XAieGbl_RegFldAttr XAieGbl_RegTileBdCtrl::Len |
Length bit field attributes.
Referenced by XAieDma_TileBdWrite().
XAieGbl_RegFldAttr XAieGbl_RegTileBdCtrl::NexBd |
Next BD bit field attributes.
Referenced by XAieDma_TileBdWrite().
XAieGbl_RegFldAttr XAieGbl_RegTileBdCtrl::NexEn |
Next BD enable bit field attributes.
Referenced by XAieDma_TileBdWrite().
XAieGbl_RegFldAttr XAieGbl_RegTileBdCtrl::Pkt |
Packet mode bit field attributes.
Referenced by XAieDma_TileBdWrite().
XAieGbl_RegFldAttr XAieGbl_RegTileBdCtrl::Valid |
Valid bit field attributes.
Referenced by XAieDma_TileBdWrite().