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v_voip_decap
Xilinx SDK Drivers API Documentation
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This header file contains identifiers and register-level core functions (or macros) that can be used to access the Xilinx VoIP Decapsulator core.
For more information about the operation of this core see the hardware specification and documentation in the higher level driver xdecap.h file.
MODIFICATION HISTORY:
Ver Who Date Changes
1.00 mmo 02/12/16 Initial release.
Macros | |
#define | XDecap_HW_H_ |
Prevent circular inclusions by using protection macros. More... | |
Register access macro definition | |
#define | XDecap_In32 Xil_In32 |
Input Operations. More... | |
#define | XDecap_Out32 Xil_Out32 |
Output Operations. More... | |
#define | XDecap_ReadReg(BaseAddress, RegOffset) XDecap_In32((BaseAddress) + ((u32)RegOffset)) |
This macro reads a value from a Decap register. More... | |
#define | XDecap_WriteReg(BaseAddress, RegOffset, Data) XDecap_Out32((BaseAddress) + ((u32)RegOffset), (u32)(Data)) |
This macro writes a value to a Decap register. More... | |
#define XDecap_HW_H_ |
Prevent circular inclusions by using protection macros.
#define XDecap_In32 Xil_In32 |
Input Operations.
#define XDecap_Out32 Xil_Out32 |
Output Operations.
#define XDecap_ReadReg | ( | BaseAddress, | |
RegOffset | |||
) | XDecap_In32((BaseAddress) + ((u32)RegOffset)) |
This macro reads a value from a Decap register.
A 32 bit read is performed. If the component is implemented in a smaller width, only the least significant data is read from the register. The most significant data will be read as 0.
BaseAddress | is the base address of the Decap core instance. |
RegOffset | is the register offset of the register (defined at the top of this file). |
Referenced by XDecap_ChannelClearStatistic(), XDecap_ChannelUpdate(), XDecap_ChIntr(), XDecap_ChStatus(), XDecap_ControlChannelEn(), XDecap_ControlMPktDetEn(), XDecap_ControlMPktDropEn(), XDecap_CoreInfo(), XDecap_DisablePacketStopIntr(), XDecap_DisableVideoLockIntr(), XDecap_DisableVideoUnLockIntr(), XDecap_DropPcktCnt(), XDecap_EnablePacketStopIntr(), XDecap_EnableVideoLockIntr(), XDecap_EnableVideoUnLockIntr(), XDecap_ErrorPacketsCnt(), XDecap_FECValidPcktCnt(), XDecap_MatchUDPDest(), XDecap_MatchUDPSrc(), XDecap_MatchVLANID(), XDecap_MediaValidPcktCnt(), XDecap_MisMatchedPacketsCnt(), XDecap_MismatchPacketCnt(), XDecap_ModuleEn(), XDecap_PacketLockWindow(), XDecap_PacketUnLockWindow(), XDecap_PeakBufferLv(), XDecap_ReOrderedPcktCnt(), XDecap_RXPacketsCnt(), XDecap_SDIPacketLockStatus(), XDecap_SetMatchSelect(), XDecap_SetOperationMode(), XDecap_SoftReset(), XDecap_StreamStat(), XDecap_StreamStopIntrStatus(), XDecap_ToMatchVLANID(), XDecap_VideoLockIntrStatus(), and XDecap_VideoUnLockIntrStatus().
#define XDecap_WriteReg | ( | BaseAddress, | |
RegOffset, | |||
Data | |||
) | XDecap_Out32((BaseAddress) + ((u32)RegOffset), (u32)(Data)) |
This macro writes a value to a Decap register.
A 32 bit write is performed. If the component is implemented in a smaller width, only the least significant data is written.
BaseAddress | is the base address of the Decap core instance. |
RegOffset | is the register offset of the register (defined at the top of this file) to be written. |
Data | is the 32-bit value to write into the register. |
Referenced by XDecap_ChannelAccess(), XDecap_ChannelClearStatistic(), XDecap_ChannelUpdate(), XDecap_ChIntr(), XDecap_ClearGeneralStatistic(), XDecap_ControlChannelEn(), XDecap_ControlMPktDetEn(), XDecap_ControlMPktDropEn(), XDecap_DisablePacketStopIntr(), XDecap_DisableVideoLockIntr(), XDecap_DisableVideoUnLockIntr(), XDecap_EnablePacketStopIntr(), XDecap_EnableVideoLockIntr(), XDecap_EnableVideoUnLockIntr(), XDecap_IntrClear(), XDecap_MatchIPv4Dest(), XDecap_MatchIPv4Src(), XDecap_MatchSSRC(), XDecap_MatchUDPDest(), XDecap_MatchUDPSrc(), XDecap_MatchVLANID(), XDecap_ModuleEn(), XDecap_PacketLockWindow(), XDecap_PacketStopTimer(), XDecap_PacketUnLockWindow(), XDecap_SetMatchSelect(), XDecap_SetOperationMode(), XDecap_SoftReset(), and XDecap_ToMatchVLANID().