dual_splitter
Xilinx SDK Drivers API Documentation
XDualSplitter_Config Struct Reference

This typedef contains configuration information for the Dual Splitter core. More...

Data Fields

u16 DeviceId
 DeviceId is the unique ID of the Dual Splitter core. More...
 
u32 BaseAddress
 BaseAddress is the physical base address of the core's registers. More...
 
u32 ActiveCols
 Active Maximum Image Width. More...
 
u32 ActiveRows
 Active Maximum Image Height. More...
 
u8 MaxSegments
 Maximum number of segments in an image. More...
 
u8 MaxTDataWidth
 Maximum Data bus Width. More...
 
u8 MaxITDataSamples
 Maximum Input Data Samples per clock. More...
 
u8 MaxOTDataSamples
 Maximum Output Data Samples per clock. More...
 
u8 MaxOverlap
 Maximum Overlap of the samples in the segments. More...
 
u8 MaxSampleWidth
 Maximum number of bits in a Sample. More...
 
u8 HasAxi4Lite
 Axi4-Lite support. More...
 
u8 HasIntrReq
 IRQ support. More...
 

Detailed Description

This typedef contains configuration information for the Dual Splitter core.

Each Dual Splitter device should have a configuration structure associated.

Field Documentation

u32 XDualSplitter_Config::ActiveCols

Active Maximum Image Width.

u32 XDualSplitter_Config::ActiveRows

Active Maximum Image Height.

u32 XDualSplitter_Config::BaseAddress
u16 XDualSplitter_Config::DeviceId

DeviceId is the unique ID of the Dual Splitter core.

u8 XDualSplitter_Config::HasAxi4Lite

Axi4-Lite support.

u8 XDualSplitter_Config::HasIntrReq

IRQ support.

Referenced by XDualSplitter_IntrHandler().

u8 XDualSplitter_Config::MaxITDataSamples

Maximum Input Data Samples per clock.

u8 XDualSplitter_Config::MaxOTDataSamples

Maximum Output Data Samples per clock.

u8 XDualSplitter_Config::MaxOverlap

Maximum Overlap of the samples in the segments.

u8 XDualSplitter_Config::MaxSampleWidth

Maximum number of bits in a Sample.

u8 XDualSplitter_Config::MaxSegments

Maximum number of segments in an image.

u8 XDualSplitter_Config::MaxTDataWidth

Maximum Data bus Width.

It is the multiplication of maximum input sample width and maximum input samples per clock