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wdttb
Xilinx SDK Drivers API Documentation
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Data Structures | |
struct | XWdtTb_Config |
This typedef contains configuration information for the device. More... | |
struct | XWdtTb |
The XWdtTb driver instance data. More... | |
Macros | |
#define | XWDTTB_HW_H_ |
Prevent circular inclusions by using protection macros. More... | |
Enumerations | |
enum | XWdtTb_Event { XWDTTB_NO_BAD_EVENT = 0, XWDTTB_RS_KICK_EVENT, XWDTTB_TSR_MM_EVENT, XWDTTB_SEC_WIN_EVENT } |
This typedef contains enumeration of different events in basic mode. More... | |
Functions | |
s32 | XWdtTb_CfgInitialize (XWdtTb *InstancePtr, const XWdtTb_Config *CfgPtr, UINTPTR EffectiveAddr) |
This function initializes the AXI Timebase Watchdog Timer core. More... | |
s32 | XWdtTb_Initialize (XWdtTb *InstancePtr, u16 DeviceId) |
Initialize a specific legacy/window watchdog timer/timebase instance/driver. More... | |
void | XWdtTb_Start (XWdtTb *InstancePtr) |
This function starts the legacy or window watchdog timer. More... | |
s32 | XWdtTb_Stop (XWdtTb *InstancePtr) |
This function disables the legacy or window watchdog timer. More... | |
u32 | XWdtTb_IsWdtExpired (const XWdtTb *InstancePtr) |
This function checks if the legacy watchdog timer has expired or window watchdog timer either in second window or not in second window. More... | |
u32 | XWdtTb_IsGenericWdtFWExpired (const XWdtTb *InstancePtr) |
This function checks if the Generic watchdog timer has First window expired or not. More... | |
void | XWdtTb_RestartWdt (const XWdtTb *InstancePtr) |
This function restarts the legacy or window watchdog timer. More... | |
void | XWdtTb_AlwaysEnable (const XWdtTb *InstancePtr) |
This function keeps Window Watchdog Timer always enabled. More... | |
void | XWdtTb_ClearLastEvent (const XWdtTb *InstancePtr) |
This function clears event(s) that present after system reset. More... | |
void | XWdtTb_ClearResetPending (const XWdtTb *InstancePtr) |
This function clears the window watchdog reset pending. More... | |
void | XWdtTb_IntrClear (const XWdtTb *InstancePtr) |
This function clears window watchdog timer interrupt (WINT) bit. More... | |
void | XWdtTb_SetByteCount (const XWdtTb *InstancePtr, u32 ByteCount) |
This function sets byte count to determine the interrupt assertion point in the second window configuration. More... | |
u32 | XWdtTb_GetByteCount (const XWdtTb *InstancePtr) |
This function provides byte count value of the selected byte count in the second window configuration. More... | |
void | XWdtTb_SetByteSegment (const XWdtTb *InstancePtr, u32 ByteSegment) |
This function sets byte segment selection to determine the interrupt assertion point in the second window configuration. More... | |
u32 | XWdtTb_GetByteSegment (const XWdtTb *InstancePtr) |
This function provides byte segment selection in the second window configuration. More... | |
void | XWdtTb_EnableSst (const XWdtTb *InstancePtr) |
This function enables Second Sequence Timer (SST) function. More... | |
void | XWdtTb_DisableSst (const XWdtTb *InstancePtr) |
This function disables Second Sequence Timer (SST) function. More... | |
void | XWdtTb_EnablePsm (const XWdtTb *InstancePtr) |
This function enables Program Sequence Monitor (PSM) function. More... | |
void | XWdtTb_DisablePsm (const XWdtTb *InstancePtr) |
This function disables Program Sequence Monitor (PSM) function. More... | |
void | XWdtTb_EnableFailCounter (XWdtTb *InstancePtr) |
This function enables Fail Counter (FC) function. More... | |
void | XWdtTb_DisableFailCounter (XWdtTb *InstancePtr) |
This function disables Fail Counter (FC) function. More... | |
void | XWdtTb_EnableExtraProtection (const XWdtTb *InstancePtr) |
This function provides extra safeguard against unintentional clear of WEN bit. More... | |
void | XWdtTb_DisableExtraProtection (const XWdtTb *InstancePtr) |
This function enables unintentional clear of WEN bit. More... | |
void | XWdtTb_SetWindowCount (const XWdtTb *InstancePtr, u32 FirstWinCount, u32 SecondWinCount) |
This function sets the count value for the first and second window. More... | |
u32 | XWdtTb_ProgramWDTWidth (const XWdtTb *InstancePtr, u32 width) |
This function programs the width of Watchdog Timer. More... | |
XWdtTb_Config * | XWdtTb_LookupConfig (u16 DeviceId) |
This function returns a reference to an XWdtTb_Config structure based on the core id, DeviceId. More... | |
s32 | XWdtTb_SelfTest (const XWdtTb *InstancePtr) |
This function runs a self-test on the timebase or window if enabled. More... | |
Register offsets for the WWDT core with Generic & windowing | |
Each register is 32 bits. | |
#define | XWT_MWR_OFFSET 0x0000U |
Master Write Control Register Offset. More... | |
#define | XWT_ESR_OFFSET 0x0004U |
Enable & Status Register Offset. More... | |
#define | XWT_FCR_OFFSET 0x0008U |
Function Control Register Register Offset. More... | |
#define | XWT_FWR_OFFSET 0x000CU |
First Window Configuration Register Offset. More... | |
#define | XWT_SWR_OFFSET 0x0010U |
Second Window Configuration Register Offset. More... | |
#define | XWT_TSR0_WWDT_OFFSET 0x0018U |
Task Signature Register 0 Offset for WWDT. More... | |
#define | XWT_TSR1_WWDT_OFFSET 0x001CU |
Task Signature Register 1 Offset for WWDT. More... | |
#define | XWT_STR_WWDT_OFFSET 0x0020U |
Second Sequence Timer Register Offset for WWDT. More... | |
#define | XWT_TSR0_OFFSET 0x0014U |
Task Signature Register 0 Offset. More... | |
#define | XWT_TSR1_OFFSET 0x0018U |
Task Signature Register 1 Offset. More... | |
#define | XWT_STR_OFFSET 0x001CU |
Second Sequence Timer Register Offset. More... | |
#define | XWT_SSTWR_OFFSET 0x0014U |
Second Sequence Timer Window Configuration Register Offset. More... | |
#define | XWT_TFR_OFFSET 0x0024U |
Token Feedback Register Offset. More... | |
#define | XWT_TRR_OFFSET 0x0028U |
Token Response Register offset. More... | |
#define | XWT_IENR_OFFSET 0x002CU |
Interrupt Enable Register Offset. More... | |
#define | XWT_IDR_OFFSET 0x0030U |
Interrupt Disable Register Offset. More... | |
#define | XWT_IMR_OFFSET 0x0034U |
Interrupt Mask Register Offset. More... | |
#define | XWT_GWRR_OFFSET 0x1000U |
Generic Watchdog Refresh Register Offset. More... | |
#define | XWT_GWCSR_OFFSET 0x2000U |
Generic Watchdog Control and Status Register Offset. More... | |
#define | XWT_GWOR_OFFSET 0x2008U |
Generic Watchdog Offset Register Offset. More... | |
#define | XWT_GWCVR0_OFFSET 0x2010U |
Generic Watchdog Compare Value Register 0 Offset. More... | |
#define | XWT_GWCVR1_OFFSET 0x2014U |
Generic Watchdog Compare Value Register 1 Offset. More... | |
#define | XWT_GW_WR_OFFSET 0x2FD0U |
Generic Watchdog Warm Reset Register Offset. More... | |
Register offsets for the AXI Timebase WDT core. Each register is 32 | |
#define | XWT_TWCSR0_OFFSET 0x00U |
Control/Status Register 0 Offset. More... | |
#define | XWT_TWCSR1_OFFSET 0x04U |
Control/Status Register 1 Offset. More... | |
#define | XWT_TBR_OFFSET 0x08U |
Timebase Register Offset. More... | |
Control/Status Register 0 bits | |
#define | XWT_CSR0_WRS_MASK 0x00000008U |
Reset status Mask. More... | |
#define | XWT_CSR0_WDS_MASK 0x00000004U |
Timer state Mask. More... | |
#define | XWT_CSR0_EWDT1_MASK 0x00000002U |
Enable bit 1 Mask. More... | |
Control/Status Register 0/1 bits | |
#define | XWT_CSRX_EWDT2_MASK 0x00000001U |
Enable bit 2 Mask. More... | |
Master Write Control bits | |
#define | XWT_MWR_AEN_MASK 0x00000002U |
Always Enable Mask. More... | |
#define | XWT_MWR_MWC_MASK 0x00000001U |
Master Write Control Mask. More... | |
Enable & Status Register bits | |
#define | XWT_ESR_LBE_MASK 0x07000000U |
Last Bad Event Mask. More... | |
#define | XWT_ESR_FCV_MASK 0x00700000U |
Fail Counter Value Mask. More... | |
#define | XWT_ESR_WRP_MASK 0x00020000U |
Watchdog Reset Pending Mask. More... | |
#define | XWT_ESR_WINT_MASK 0x00010000U |
Watchdog Interrupt Mask. More... | |
#define | XWT_ESR_WSW_MASK 0x00000100U |
Watchdog Second Window Mask. More... | |
#define | XWT_ESR_WCFG_MASK 0x00000002U |
Wrong Configuration Mask. More... | |
#define | XWT_ESR_WEN_MASK 0x00000001U |
Window WDT Enable Mask. More... | |
#define | XWT_ESR_LBE_SHIFT 24U |
Last Bad Event Shift. More... | |
#define | XWT_ESR_FCV_SHIFT 20U |
Fail Counter Value Shift. More... | |
#define | XWT_ESR_WRP_SHIFT 17U |
Watchdog Reset Pending Shift. More... | |
#define | XWT_ESR_WINT_SHIFT 16U |
Watchdog Interrupt Shift. More... | |
#define | XWT_ESR_WSW_SHIFT 8U |
Watchdog Second Window Shift. More... | |
#define | XWT_ESR_WCFG_SHIFT 1U |
Wrong Configuration Shift. More... | |
Function Control Register bits | |
#define | XWT_FCR_SBC_MASK 0x0000FF00U |
Selected Byte Count Mask. More... | |
#define | XWT_FCR_BSS_MASK 0x000000C0U |
Byte Segment Selection Mask. More... | |
#define | XWT_FCR_SSTE_MASK 0x00000010U |
Second Sequence Timer Enable Mask. More... | |
#define | XWT_FCR_PSME_MASK 0x00000008U |
Program Sequence Monitor Enable Mask. More... | |
#define | XWT_FCR_FCE_MASK 0x00000004U |
Fail Counter Enable Mask. More... | |
#define | XWT_FCR_WM_MASK 0x00000002U |
Window WDT Mode Mask. More... | |
#define | XWT_FCR_WDP_MASK 0x00000001U |
Window WDT Disable Protection Mask. More... | |
#define | XWT_FCR_SBC_SHIFT 8U |
Selected Byte Count Shift. More... | |
#define | XWT_FCR_BSS_SHIFT 6U |
Byte Segment Selection Shift. More... | |
#define | XWT_FCR_SSTE_SHIFT 4U |
Second Sequence Timer Enable Shift. More... | |
#define | XWT_FCR_WM_SHIFT 1U |
Window WDT Mode Shift. More... | |
Generic Watchdog Control and Status Register bits | |
#define | XWT_GWCSR_GWEN_MASK 0x00000001U |
Watchdog enable bit. More... | |
#define | XWT_GWCSR_GWS1_MASK 0x00000002U |
Generic_wdt_interrupt bit. More... | |
#define | XWT_GWCSR_GWS2_MASK 0x00000004U |
Generic_wdt_reset bit. More... | |
Register access macro definition | |
#define | XWdtTb_In32 Xil_In32 |
Input Operations. More... | |
#define | XWdtTb_Out32 Xil_Out32 |
Output Operations. More... | |
#define | XWdtTb_ReadReg(BaseAddress, RegOffset) XWdtTb_In32((BaseAddress) + ((u32)RegOffset)) |
Read from the specified WdtTb core's register. More... | |
#define | XWdtTb_WriteReg(BaseAddress, RegOffset, RegisterValue) XWdtTb_Out32((BaseAddress) + ((u32)RegOffset), (u32)(RegisterValue)) |
Write to the specified WdtTb core's register. More... | |
#define XWDTTB_HW_H_ |
Prevent circular inclusions by using protection macros.
#define XWdtTb_In32 Xil_In32 |
Input Operations.
#define XWdtTb_Out32 Xil_Out32 |
Output Operations.
#define XWdtTb_ReadReg | ( | BaseAddress, | |
RegOffset | |||
) | XWdtTb_In32((BaseAddress) + ((u32)RegOffset)) |
Read from the specified WdtTb core's register.
BaseAddress | contains the base address of the core. |
RegOffset | contains the offset from the 1st register of the core to select the specific register. |
Referenced by WdtTbExample(), WdtTbIntrExample(), XWdtTb_AlwaysEnable(), XWdtTb_ClearLastEvent(), XWdtTb_ClearResetPending(), XWdtTb_DisableExtraProtection(), XWdtTb_DisableFailCounter(), XWdtTb_DisablePsm(), XWdtTb_DisableSst(), XWdtTb_EnableExtraProtection(), XWdtTb_EnableFailCounter(), XWdtTb_EnablePsm(), XWdtTb_EnableSst(), XWdtTb_GetByteCount(), XWdtTb_GetByteSegment(), XWdtTb_IntrClear(), XWdtTb_IsGenericWdtFWExpired(), XWdtTb_IsWdtExpired(), XWdtTb_LowLevelExample(), XWdtTb_RestartWdt(), XWdtTb_SelfTest(), XWdtTb_SetByteCount(), and XWdtTb_SetByteSegment().
#define XWdtTb_WriteReg | ( | BaseAddress, | |
RegOffset, | |||
RegisterValue | |||
) | XWdtTb_Out32((BaseAddress) + ((u32)RegOffset), (u32)(RegisterValue)) |
Write to the specified WdtTb core's register.
BaseAddress | contains the base address of the core. |
RegOffset | contains the offset from the 1st register of the core to select the specific register. |
RegisterValue | is the value to be written to the register. |
Referenced by XWdtTb_AlwaysEnable(), XWdtTb_CfgInitialize(), XWdtTb_ClearLastEvent(), XWdtTb_ClearResetPending(), XWdtTb_DisableExtraProtection(), XWdtTb_DisableFailCounter(), XWdtTb_DisablePsm(), XWdtTb_DisableSst(), XWdtTb_EnableExtraProtection(), XWdtTb_EnableFailCounter(), XWdtTb_EnablePsm(), XWdtTb_EnableSst(), XWdtTb_IntrClear(), XWdtTb_LowLevelExample(), XWdtTb_ProgramWDTWidth(), XWdtTb_RestartWdt(), XWdtTb_SelfTest(), XWdtTb_SetByteCount(), XWdtTb_SetByteSegment(), and XWdtTb_SetWindowCount().
#define XWT_CSR0_EWDT1_MASK 0x00000002U |
Enable bit 1 Mask.
Referenced by XWdtTb_LowLevelExample().
#define XWT_CSR0_WDS_MASK 0x00000004U |
Timer state Mask.
Referenced by XWdtTb_IsWdtExpired(), XWdtTb_LowLevelExample(), and XWdtTb_RestartWdt().
#define XWT_CSR0_WRS_MASK 0x00000008U |
Reset status Mask.
Referenced by WdtTbExample(), WdtTbIntrExample(), XWdtTb_IsWdtExpired(), XWdtTb_LowLevelExample(), and XWdtTb_RestartWdt().
#define XWT_CSRX_EWDT2_MASK 0x00000001U |
Enable bit 2 Mask.
Referenced by XWdtTb_LowLevelExample().
#define XWT_ESR_FCV_MASK 0x00700000U |
Fail Counter Value Mask.
#define XWT_ESR_FCV_SHIFT 20U |
Fail Counter Value Shift.
#define XWT_ESR_LBE_MASK 0x07000000U |
Last Bad Event Mask.
Referenced by XWdtTb_ClearLastEvent(), and XWdtTb_SelfTest().
#define XWT_ESR_LBE_SHIFT 24U |
Last Bad Event Shift.
Referenced by XWdtTb_SelfTest().
#define XWT_ESR_OFFSET 0x0004U |
Enable & Status Register Offset.
Referenced by XWdtTb_ClearLastEvent(), XWdtTb_ClearResetPending(), XWdtTb_IntrClear(), XWdtTb_IsWdtExpired(), XWdtTb_RestartWdt(), and XWdtTb_SelfTest().
#define XWT_ESR_WCFG_MASK 0x00000002U |
Wrong Configuration Mask.
#define XWT_ESR_WCFG_SHIFT 1U |
Wrong Configuration Shift.
#define XWT_ESR_WEN_MASK 0x00000001U |
Window WDT Enable Mask.
Referenced by XWdtTb_SelfTest().
#define XWT_ESR_WINT_MASK 0x00010000U |
Watchdog Interrupt Mask.
Referenced by XWdtTb_IntrClear().
#define XWT_ESR_WINT_SHIFT 16U |
Watchdog Interrupt Shift.
#define XWT_ESR_WRP_MASK 0x00020000U |
Watchdog Reset Pending Mask.
Referenced by XWdtTb_ClearResetPending().
#define XWT_ESR_WRP_SHIFT 17U |
Watchdog Reset Pending Shift.
#define XWT_ESR_WSW_MASK 0x00000100U |
Watchdog Second Window Mask.
Referenced by XWdtTb_ClearLastEvent(), XWdtTb_IntrClear(), XWdtTb_IsWdtExpired(), XWdtTb_RestartWdt(), and XWdtTb_SelfTest().
#define XWT_ESR_WSW_SHIFT 8U |
Watchdog Second Window Shift.
Referenced by XWdtTb_ClearLastEvent(), XWdtTb_IntrClear(), and XWdtTb_IsWdtExpired().
#define XWT_FCR_BSS_MASK 0x000000C0U |
Byte Segment Selection Mask.
Referenced by XWdtTb_GetByteSegment(), and XWdtTb_SetByteSegment().
#define XWT_FCR_BSS_SHIFT 6U |
Byte Segment Selection Shift.
Referenced by XWdtTb_GetByteSegment(), and XWdtTb_SetByteSegment().
#define XWT_FCR_FCE_MASK 0x00000004U |
Fail Counter Enable Mask.
Referenced by XWdtTb_DisableFailCounter(), and XWdtTb_EnableFailCounter().
#define XWT_FCR_OFFSET 0x0008U |
Function Control Register Register Offset.
Referenced by XWdtTb_DisableExtraProtection(), XWdtTb_DisableFailCounter(), XWdtTb_DisablePsm(), XWdtTb_DisableSst(), XWdtTb_EnableExtraProtection(), XWdtTb_EnableFailCounter(), XWdtTb_EnablePsm(), XWdtTb_EnableSst(), XWdtTb_GetByteCount(), XWdtTb_GetByteSegment(), XWdtTb_SetByteCount(), and XWdtTb_SetByteSegment().
#define XWT_FCR_PSME_MASK 0x00000008U |
Program Sequence Monitor Enable Mask.
Referenced by XWdtTb_DisablePsm(), and XWdtTb_EnablePsm().
#define XWT_FCR_SBC_MASK 0x0000FF00U |
Selected Byte Count Mask.
Referenced by XWdtTb_GetByteCount(), and XWdtTb_SetByteCount().
#define XWT_FCR_SBC_SHIFT 8U |
Selected Byte Count Shift.
Referenced by XWdtTb_GetByteCount(), and XWdtTb_SetByteCount().
#define XWT_FCR_SSTE_MASK 0x00000010U |
Second Sequence Timer Enable Mask.
Referenced by XWdtTb_DisableSst(), and XWdtTb_EnableSst().
#define XWT_FCR_SSTE_SHIFT 4U |
Second Sequence Timer Enable Shift.
#define XWT_FCR_WDP_MASK 0x00000001U |
Window WDT Disable Protection Mask.
Referenced by XWdtTb_DisableExtraProtection(), and XWdtTb_EnableExtraProtection().
#define XWT_FCR_WM_MASK 0x00000002U |
Window WDT Mode Mask.
#define XWT_FCR_WM_SHIFT 1U |
Window WDT Mode Shift.
#define XWT_FWR_OFFSET 0x000CU |
First Window Configuration Register Offset.
Referenced by XWdtTb_SelfTest(), and XWdtTb_SetWindowCount().
#define XWT_GW_WR_OFFSET 0x2FD0U |
Generic Watchdog Warm Reset Register Offset.
Referenced by XWdtTb_CfgInitialize().
#define XWT_GWCSR_GWEN_MASK 0x00000001U |
Watchdog enable bit.
Referenced by XWdtTb_SelfTest().
#define XWT_GWCSR_GWS1_MASK 0x00000002U |
Generic_wdt_interrupt bit.
Referenced by XWdtTb_IsGenericWdtFWExpired().
#define XWT_GWCSR_GWS2_MASK 0x00000004U |
Generic_wdt_reset bit.
Referenced by XWdtTb_IsWdtExpired().
#define XWT_GWCSR_OFFSET 0x2000U |
Generic Watchdog Control and Status Register Offset.
Referenced by XWdtTb_IsGenericWdtFWExpired(), XWdtTb_IsWdtExpired(), and XWdtTb_SelfTest().
#define XWT_GWCVR0_OFFSET 0x2010U |
Generic Watchdog Compare Value Register 0 Offset.
Referenced by XWdtTb_SelfTest().
#define XWT_GWCVR1_OFFSET 0x2014U |
Generic Watchdog Compare Value Register 1 Offset.
Referenced by XWdtTb_SelfTest().
#define XWT_GWOR_OFFSET 0x2008U |
Generic Watchdog Offset Register Offset.
Referenced by XWdtTb_SelfTest().
#define XWT_GWRR_OFFSET 0x1000U |
Generic Watchdog Refresh Register Offset.
Referenced by XWdtTb_RestartWdt(), and XWdtTb_SelfTest().
#define XWT_IDR_OFFSET 0x0030U |
Interrupt Disable Register Offset.
#define XWT_IENR_OFFSET 0x002CU |
Interrupt Enable Register Offset.
#define XWT_IMR_OFFSET 0x0034U |
Interrupt Mask Register Offset.
#define XWT_MWR_AEN_MASK 0x00000002U |
Always Enable Mask.
Referenced by XWdtTb_AlwaysEnable().
#define XWT_MWR_MWC_MASK 0x00000001U |
Master Write Control Mask.
#define XWT_MWR_OFFSET 0x0000U |
Master Write Control Register Offset.
Referenced by XWdtTb_AlwaysEnable(), XWdtTb_ProgramWDTWidth(), and XWdtTb_SelfTest().
#define XWT_SSTWR_OFFSET 0x0014U |
Second Sequence Timer Window Configuration Register Offset.
#define XWT_STR_OFFSET 0x001CU |
Second Sequence Timer Register Offset.
#define XWT_STR_WWDT_OFFSET 0x0020U |
Second Sequence Timer Register Offset for WWDT.
#define XWT_SWR_OFFSET 0x0010U |
Second Window Configuration Register Offset.
Referenced by XWdtTb_SelfTest(), and XWdtTb_SetWindowCount().
#define XWT_TBR_OFFSET 0x08U |
Timebase Register Offset.
Referenced by XWdtTb_SelfTest().
#define XWT_TFR_OFFSET 0x0024U |
Token Feedback Register Offset.
#define XWT_TRR_OFFSET 0x0028U |
Token Response Register offset.
#define XWT_TSR0_OFFSET 0x0014U |
Task Signature Register 0 Offset.
#define XWT_TSR0_WWDT_OFFSET 0x0018U |
Task Signature Register 0 Offset for WWDT.
#define XWT_TSR1_OFFSET 0x0018U |
Task Signature Register 1 Offset.
#define XWT_TSR1_WWDT_OFFSET 0x001CU |
Task Signature Register 1 Offset for WWDT.
#define XWT_TWCSR0_OFFSET 0x00U |
Control/Status Register 0 Offset.
Referenced by WdtTbExample(), WdtTbIntrExample(), XWdtTb_IsWdtExpired(), XWdtTb_LowLevelExample(), and XWdtTb_RestartWdt().
#define XWT_TWCSR1_OFFSET 0x04U |
Control/Status Register 1 Offset.
Referenced by XWdtTb_LowLevelExample().
enum XWdtTb_Event |
void XWdtTb_AlwaysEnable | ( | const XWdtTb * | InstancePtr | ) |
This function keeps Window Watchdog Timer always enabled.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_MWR_AEN_MASK, and XWT_MWR_OFFSET.
s32 XWdtTb_CfgInitialize | ( | XWdtTb * | InstancePtr, |
const XWdtTb_Config * | CfgPtr, | ||
UINTPTR | EffectiveAddr | ||
) |
This function initializes the AXI Timebase Watchdog Timer core.
This function must be called prior to using the core. Initialization of the core includes setting up the instance data and ensuring the hardware is in a quiescent state.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
CfgPtr | points to the configuration structure associated with the AXI Timebase Watchdog Timer core. |
EffectiveAddr | is the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb_Config::DeviceId, XWdtTb::EnableFailCounter, XWdtTb::EnableWinMode, XWdtTb_Config::EnableWinWdt, XWdtTb_Config::IsPl, XWdtTb::IsReady, XWdtTb::IsStarted, XWdtTb_Config::MaxCountWidth, XWdtTb_Config::SstCountWidth, XWdtTb_WriteReg, and XWT_GW_WR_OFFSET.
Referenced by GWdtTbExample(), GWdtTbSelfTestExample(), WdtTbExample(), WdtTbIntrExample(), and WdtTbSelfTestExample().
void XWdtTb_ClearLastEvent | ( | const XWdtTb * | InstancePtr | ) |
This function clears event(s) that present after system reset.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_ESR_LBE_MASK, XWT_ESR_OFFSET, XWT_ESR_WSW_MASK, and XWT_ESR_WSW_SHIFT.
void XWdtTb_ClearResetPending | ( | const XWdtTb * | InstancePtr | ) |
This function clears the window watchdog reset pending.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_ESR_OFFSET, and XWT_ESR_WRP_MASK.
void XWdtTb_DisableExtraProtection | ( | const XWdtTb * | InstancePtr | ) |
This function enables unintentional clear of WEN bit.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_OFFSET, and XWT_FCR_WDP_MASK.
void XWdtTb_DisableFailCounter | ( | XWdtTb * | InstancePtr | ) |
This function disables Fail Counter (FC) function.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableFailCounter, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_FCE_MASK, and XWT_FCR_OFFSET.
Referenced by WinWdtIntrExample().
void XWdtTb_DisablePsm | ( | const XWdtTb * | InstancePtr | ) |
This function disables Program Sequence Monitor (PSM) function.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_OFFSET, and XWT_FCR_PSME_MASK.
Referenced by WinWdtIntrExample().
void XWdtTb_DisableSst | ( | const XWdtTb * | InstancePtr | ) |
This function disables Second Sequence Timer (SST) function.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_OFFSET, and XWT_FCR_SSTE_MASK.
Referenced by WinWdtIntrExample().
void XWdtTb_EnableExtraProtection | ( | const XWdtTb * | InstancePtr | ) |
This function provides extra safeguard against unintentional clear of WEN bit.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_OFFSET, and XWT_FCR_WDP_MASK.
void XWdtTb_EnableFailCounter | ( | XWdtTb * | InstancePtr | ) |
This function enables Fail Counter (FC) function.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableFailCounter, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_FCE_MASK, and XWT_FCR_OFFSET.
void XWdtTb_EnablePsm | ( | const XWdtTb * | InstancePtr | ) |
This function enables Program Sequence Monitor (PSM) function.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_OFFSET, and XWT_FCR_PSME_MASK.
void XWdtTb_EnableSst | ( | const XWdtTb * | InstancePtr | ) |
This function enables Second Sequence Timer (SST) function.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_OFFSET, and XWT_FCR_SSTE_MASK.
u32 XWdtTb_GetByteCount | ( | const XWdtTb * | InstancePtr | ) |
This function provides byte count value of the selected byte count in the second window configuration.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWT_FCR_OFFSET, XWT_FCR_SBC_MASK, and XWT_FCR_SBC_SHIFT.
u32 XWdtTb_GetByteSegment | ( | const XWdtTb * | InstancePtr | ) |
This function provides byte segment selection in the second window configuration.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWT_FCR_BSS_MASK, XWT_FCR_BSS_SHIFT, and XWT_FCR_OFFSET.
s32 XWdtTb_Initialize | ( | XWdtTb * | InstancePtr, |
u16 | DeviceId | ||
) |
Initialize a specific legacy/window watchdog timer/timebase instance/driver.
This function must be called before other functions of the driver are called.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
DeviceId | is the unique id of the device controlled by this XWdtTb instance. Passing in a device id associates the generic XWdtTb instance to a specific device, as chosen by the caller or application developer. |
References XWdtTb::Config, XWdtTb::EnableFailCounter, XWdtTb::EnableWinMode, XWdtTb::IsReady, XWdtTb::IsStarted, and XWdtTb_LookupConfig().
Referenced by WinWdtIntrExample().
void XWdtTb_IntrClear | ( | const XWdtTb * | InstancePtr | ) |
This function clears window watchdog timer interrupt (WINT) bit.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_ESR_OFFSET, XWT_ESR_WINT_MASK, XWT_ESR_WSW_MASK, and XWT_ESR_WSW_SHIFT.
Referenced by WinWdtIntrExample().
u32 XWdtTb_IsGenericWdtFWExpired | ( | const XWdtTb * | InstancePtr | ) |
This function checks if the Generic watchdog timer has First window expired or not.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb_ReadReg, XWT_GWCSR_GWS1_MASK, and XWT_GWCSR_OFFSET.
Referenced by GWdtTbExample().
u32 XWdtTb_IsWdtExpired | ( | const XWdtTb * | InstancePtr | ) |
This function checks if the legacy watchdog timer has expired or window watchdog timer either in second window or not in second window.
This function is used for polled mode in legacy watchdog timer.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_Config::IsPl, XWdtTb::IsReady, XWdtTb_ReadReg, XWT_CSR0_WDS_MASK, XWT_CSR0_WRS_MASK, XWT_ESR_OFFSET, XWT_ESR_WSW_MASK, XWT_ESR_WSW_SHIFT, XWT_GWCSR_GWS2_MASK, XWT_GWCSR_OFFSET, and XWT_TWCSR0_OFFSET.
Referenced by GWdtTbExample(), and WdtTbExample().
XWdtTb_Config* XWdtTb_LookupConfig | ( | u16 | DeviceId | ) |
This function returns a reference to an XWdtTb_Config structure based on the core id, DeviceId.
The return value will refer to an entry in the device configuration table defined in the xwdttb_g.c file.
DeviceId | is the unique core ID of the XWdtTb core for the lookup operation. |
Referenced by GWdtTbExample(), GWdtTbSelfTestExample(), WdtTbExample(), WdtTbIntrExample(), WdtTbSelfTestExample(), and XWdtTb_Initialize().
u32 XWdtTb_ProgramWDTWidth | ( | const XWdtTb * | InstancePtr, |
u32 | width | ||
) |
This function programs the width of Watchdog Timer.
InstancePtr | - InstancePtr is a pointer to the XWdtTb instance to be worked on. width - width of the Watchdog Timer. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_WriteReg, and XWT_MWR_OFFSET.
void XWdtTb_RestartWdt | ( | const XWdtTb * | InstancePtr | ) |
This function restarts the legacy or window watchdog timer.
An application needs to call this function periodically to keep the timer from asserting the reset output.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_Config::IsPl, XWdtTb::IsReady, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_CSR0_WDS_MASK, XWT_CSR0_WRS_MASK, XWT_ESR_OFFSET, XWT_ESR_WSW_MASK, XWT_GWRR_OFFSET, and XWT_TWCSR0_OFFSET.
Referenced by GWdtTbExample(), and WdtTbExample().
s32 XWdtTb_SelfTest | ( | const XWdtTb * | InstancePtr | ) |
This function runs a self-test on the timebase or window if enabled.
Timebase test verifies that the timebase is incrementing. The watchdog timer is not tested due to the time required to wait for the watchdog timer to expire. The time consumed by this test is dependent on the system clock and the configuration of the dividers in for the input clock of the timebase.
Window test verifies that the windowing feature does not generate bad event after enabling window feature with first and second window count. It disables window feature immediately.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_Config::IsPl, XWdtTb::IsReady, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_ESR_LBE_MASK, XWT_ESR_LBE_SHIFT, XWT_ESR_OFFSET, XWT_ESR_WEN_MASK, XWT_ESR_WSW_MASK, XWT_FWR_OFFSET, XWT_GWCSR_GWEN_MASK, XWT_GWCSR_OFFSET, XWT_GWCVR0_OFFSET, XWT_GWCVR1_OFFSET, XWT_GWOR_OFFSET, XWT_GWRR_OFFSET, XWT_MWR_OFFSET, XWT_SWR_OFFSET, and XWT_TBR_OFFSET.
Referenced by GWdtTbExample(), GWdtTbSelfTestExample(), WdtTbExample(), WdtTbIntrExample(), WdtTbSelfTestExample(), and WinWdtIntrExample().
void XWdtTb_SetByteCount | ( | const XWdtTb * | InstancePtr, |
u32 | ByteCount | ||
) |
This function sets byte count to determine the interrupt assertion point in the second window configuration.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
ByteCount | specifies the selected byte count value to be set in the second window configuration. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_OFFSET, XWT_FCR_SBC_MASK, and XWT_FCR_SBC_SHIFT.
Referenced by WinWdtIntrExample().
void XWdtTb_SetByteSegment | ( | const XWdtTb * | InstancePtr, |
u32 | ByteSegment | ||
) |
This function sets byte segment selection to determine the interrupt assertion point in the second window configuration.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
ByteSegment | specifies the byte segment selected.
|
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_ReadReg, XWdtTb_WriteReg, XWT_FCR_BSS_MASK, XWT_FCR_BSS_SHIFT, and XWT_FCR_OFFSET.
Referenced by WinWdtIntrExample().
void XWdtTb_SetWindowCount | ( | const XWdtTb * | InstancePtr, |
u32 | FirstWinCount, | ||
u32 | SecondWinCount | ||
) |
This function sets the count value for the first and second window.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
FirstWinCount | specifies the first window count value. |
SecondWinCount | specifies the second window count value. |
References XWdtTb_Config::BaseAddr, XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_WriteReg, XWT_FWR_OFFSET, and XWT_SWR_OFFSET.
Referenced by WinWdtIntrExample().
void XWdtTb_Start | ( | XWdtTb * | InstancePtr | ) |
This function starts the legacy or window watchdog timer.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_Config::IsPl, and XWdtTb::IsReady.
Referenced by GWdtTbExample(), WdtTbExample(), WdtTbIntrExample(), and WinWdtIntrExample().
s32 XWdtTb_Stop | ( | XWdtTb * | InstancePtr | ) |
This function disables the legacy or window watchdog timer.
It is the caller's responsibility to disconnect the interrupt handler of the watchdog timer from the interrupt source, typically an interrupt controller, and disable the interrupt in the interrupt controller.
InstancePtr | is a pointer to the XWdtTb instance to be worked on. |
References XWdtTb::Config, XWdtTb::EnableWinMode, XWdtTb_Config::IsPl, and XWdtTb::IsReady.
Referenced by GWdtTbExample(), GWdtTbSelfTestExample(), WdtTbExample(), WdtTbIntrExample(), and WinWdtIntrExample().