aiengine
Xilinx SDK Drivers API Documentation
Data Structures
Here are the data structures with brief descriptions:
oCXAieDma_ShimThis typedef is the Shim DMA instance
oCXAieDma_ShimBdThis typedef contains all the attributes for the BD configuration
oCXAieDma_ShimBdAxiThis typedef contains the AXI attributes for the BD
oCXAieDma_ShimBdLkThis typedef contains the lock attributes for the BD
oCXAieDma_TileThis typedef is the Tile DMA instance
oCXAieDma_TileBdThis typedef contains all the attributes for the BD configuration
oCXAieDma_TileBdLockThis typedef contains the lock and base address attributes of the double buffer for the BD
oCXAieDma_TileBdXyThis typedef contains the X/Y 2D addressing attributes for the BD
oCXAieGblThe XAie driver instance data
oCXAieGbl_ConfigThis typedef contains configuration information for the device
oCXAieGbl_GroupEventsThis typedef contains the mask attributes for Group Events
oCXAieGbl_HwCfgThis typedef contains the HW configuration data for the AIE array
oCXAieGbl_RegCoreCtrlThis typedef contains the attributes for the Core control register
oCXAieGbl_RegCorePCEventThis typedef contains the attributes for Core PC events
oCXAieGbl_RegCoreStsThis typedef contains the attributes for the Core status register
oCXAieGbl_RegEventBroadcastThis typedef contains the attributes for Event broadcast registers
oCXAieGbl_RegEventBroadcastClearThis typedef contains the attributes for Event broadcast clear registers
oCXAieGbl_RegEventBroadcastSetThis typedef contains the attributes for Event broadcast set registers
oCXAieGbl_RegEventBroadcastValueThis typedef contains the attributes for Event broadcast value registers
oCXAieGbl_RegEventGenerateThis typedef contains the attributes for Event generate registers
oCXAieGbl_RegFldAttrThis typedef contains the attributes for the register bit fields
oCXAieGbl_RegLocksThis typedef contains the attributes for the Release/Acquire register bit fields
oCXAieGbl_RegPerfCounterThis typedef contains the attributes for Performance Counter
oCXAieGbl_RegPerfCounterEventThis typedef contains the attributes for Performance Counter Event
oCXAieGbl_RegPerfCtrlResetThis typedef contains the attributes for Performance Counter reset registers
oCXAieGbl_RegPerfCtrlsThis typedef contains the attributes for all Performance Counter ctrl registers
oCXAieGbl_RegPlDwszThis typedef contains the attributes for the PL downsizer config register
oCXAieGbl_RegPlDwszBypassThis typedef contains the attributes for the PL downsizer enable register
oCXAieGbl_RegPlDwszEnThis typedef contains the attributes for the PL downsizer enable register
oCXAieGbl_RegPlUpszThis typedef contains the attributes for the PL upsizer config register
oCXAieGbl_RegShimBdAxiThis typedef contains the attributes for Shim DMA BD AXI word register
oCXAieGbl_RegShimBdCtrlThis typedef contains the attributes for Shim DMA BD Control word register
oCXAieGbl_RegShimBdPktThis typedef contains the attributes for Shim DMA BD packet word register
oCXAieGbl_RegShimColumnResetThis typedef contains the attributes for Shim colum reset register
oCXAieGbl_RegShimDemCfgThis typedef contains the attributes for Shim stream Demux config registers
oCXAieGbl_RegShimDmaBdThis typedef contains the attributes for Shim DMA BD data structure
oCXAieGbl_RegShimDmaChThis typedef contains the attributes for Shim DMA channel registers
oCXAieGbl_RegShimDmaStsThis typedef contains the attributes for Shim DMA status registers
oCXAieGbl_RegShimMuxCfgThis typedef contains the attributes for Shim stream Mux config registers
oCXAieGbl_RegShimResetThis typedef contains the attributes for Shim reset register
oCXAieGbl_RegStrmEvtPortThis typedef contains the attributes for stream switch event port select registers
oCXAieGbl_RegStrmMstrThis typedef contains the attributes for Stream switch master port config register
oCXAieGbl_RegStrmSlotThis typedef contains the attributes for Stream switch slave slot config register
oCXAieGbl_RegStrmSlvThis typedef contains the attributes for Stream switch slave port config register
oCXAieGbl_RegStrmSwEventPortSelectThis typedef contains the attributes for Stream Switch Event Port Selection register
oCXAieGbl_RegTileBd2DThis typedef contains the attributes for Tile DMA BD 2D word register
oCXAieGbl_RegTileBdAddThis typedef contains the attributes for Tile DMA BD address word register
oCXAieGbl_RegTileBdCtrlThis typedef contains the attributes for Tile DMA BD Control word register
oCXAieGbl_RegTileBdIntThis typedef contains the attributes for Tile DMA BD Interleave word register
oCXAieGbl_RegTileBdPktThis typedef contains the attributes for Tile DMA BD Packet word register
oCXAieGbl_RegTileDmaBdThis typedef contains the attributes for Tile DMA BD data structure
oCXAieGbl_RegTileDmaChThis typedef contains the attributes for Tile DMA Channel registers
oCXAieGbl_RegTimerThis typedef contains the attributes for Timer control and value regs
oCXAieGbl_RegTraceCtrlsThis typedef contains the attributes for Trace ctrl registers
oCXAieGbl_RegTraceEventThis typedef contains the attributes for Trace event registers
oCXAieGbl_TileThis typedef contains configuration information of the tiles
oCXAieSim_StackSzThis typedef contains all the stack range addresses derived from the map file
oCXSockCliThis typedef contains the socket attributes which make the Client socket instance
\CXSockStrThis typedef contains pointer to the client socket instance for the same to be used in the memory IO functions