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aiengine
Xilinx SDK Drivers API Documentation
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Header file for stream switch configuration.
MODIFICATION HISTORY:
Ver Who Date Changes
1.0 Naresh 04/06/2018 Initial creation 1.1 Naresh 07/11/2018 Updated copyright info 1.2 Hyun 10/03/2018 Added the event port select function 1.3 Hyun 10/08/2018 Added the offset for shim trace slave port 1.4 Nishad 12/05/2018 Renamed ME attributes to AIE 1.5 Wendy 16/05/2019 Wrap pointers parameters with () in macro
#define | XAIETILE_STRSW_MPORT_CFGPKT(TileInstPtr, Master, DropHdr, Msk, Arbiter) |
Macro to frame the configuration word for the Master port. More... | |
#define | XAIETILE_STRSW_SLVSLOT_CFG(TileInstPtr, Slave, SlotIdx, SlotId,SlotMask, SlotEnable, SlotMsel, SlotArbiter) |
Macro to frame the configuration word for the slave port slot register. More... | |
#define | XAIETILE_STRSW_SPORT_CORE(TileInstPtr, Idx) (XAIETILE_TILESTRSW_SPORT_CORE_OFF + Idx) |
Macro to compute the ID value of stream switch slave port-Core. More... | |
#define | XAIETILE_STRSW_SPORT_DMA(TileInstPtr, Idx) (XAIETILE_TILESTRSW_SPORT_DMA_OFF + Idx) |
Macro to compute the ID value of stream switch slave port-DMA. More... | |
#define | XAIETILE_STRSW_SPORT_CTRL(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch slave port-Ctrl. More... | |
#define | XAIETILE_STRSW_SPORT_FIFO(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch slave port-FIFO. More... | |
#define | XAIETILE_STRSW_SPORT_SOUTH(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch slave port-South. More... | |
#define | XAIETILE_STRSW_SPORT_WEST(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch slave port-West. More... | |
#define | XAIETILE_STRSW_SPORT_NORTH(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch slave port-North. More... | |
#define | XAIETILE_STRSW_SPORT_EAST(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch slave port-East. More... | |
#define | XAIETILE_STRSW_SPORT_TRACE(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch slave port-Trace. More... | |
#define | XAIETILE_STRSW_MPORT_CORE(TileInstPtr, Idx) (XAIETILE_TILESTRSW_MPORT_CORE_OFF + Idx) |
Macro to compute the ID value of stream switch master port-Core. More... | |
#define | XAIETILE_STRSW_MPORT_DMA(TileInstPtr, Idx) (XAIETILE_TILESTRSW_MPORT_DMA_OFF + Idx) |
Macro to compute the ID value of stream switch master port-DMA. More... | |
#define | XAIETILE_STRSW_MPORT_CTRL(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch master port-Ctrl. More... | |
#define | XAIETILE_STRSW_MPORT_FIFO(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch master port-FIFO. More... | |
#define | XAIETILE_STRSW_MPORT_SOUTH(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch master port-South. More... | |
#define | XAIETILE_STRSW_MPORT_WEST(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch master port-West. More... | |
#define | XAIETILE_STRSW_MPORT_NORTH(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch master port-North. More... | |
#define | XAIETILE_STRSW_MPORT_EAST(TileInstPtr, Idx) |
Macro to compute the ID value of stream switch master port-East. More... | |
#define | XAIETILE_STRSW_MPORT_TRACE(TileInstPtr, Idx) (XAIETILE_TILESTRSW_MPORT_TRACE_OFF + Idx) |
Macro to compute the ID value of stream switch master port-Trace. More... | |
void | XAieTile_StrmConnectCct (XAieGbl_Tile *TileInstPtr, u8 Slave, u8 Master, u8 SlvEnable) |
This API is used to connect the selected master port to the specified slave port of the stream switch. More... | |
void | XAieTile_StrmConfigMstr (XAieGbl_Tile *TileInstPtr, u8 Master, u8 Enable, u8 PktEnable, u8 Config) |
This API is used to configure the selected master port of the stream switch in the corresponding tile as per the parameters. More... | |
void | XAieTile_StrmConfigSlv (XAieGbl_Tile *TileInstPtr, u8 Slave, u8 Enable, u8 PktEnable) |
This API is used to configure the selected slave port of the stream switch in the corresponding tile. More... | |
void | XAieTile_StrmConfigSlvSlot (XAieGbl_Tile *TileInstPtr, u8 Slave, u8 Slot, u8 Enable, u32 RegVal) |
This API is used to configure the selected slot of the slave port in the stream switch of the corresponding tile. More... | |
void | XAieTile_ShimStrmMuxConfig (XAieGbl_Tile *TileInstPtr, u32 Port, u32 Input) |
This API sets up the mux configuraiton for Shim. More... | |
void | XAieTile_ShimStrmDemuxConfig (XAieGbl_Tile *TileInstPtr, u32 Port, u32 Output) |
This API sets up the mux configuraiton for Shim DMA. More... | |
void | XAieTile_StrmEventPortSelect (XAieGbl_Tile *TileInstPtr, u8 Port, u8 Master, u8 Id) |
This API sets up the event port in stream switch. More... | |
#define XAIETILE_STRSW_MPORT_CFGPKT | ( | TileInstPtr, | |
Master, | |||
DropHdr, | |||
Msk, | |||
Arbiter | |||
) |
Macro to frame the configuration word for the Master port.
TileInstPtr | - Pointer to the Tile instance. |
Master | - Master port ID value. |
DropHdr | - Drop header on packet. |
Msk | - Mask to be used on packet ID. |
Arbiter | - Arbiter to use when packet matches. |
Referenced by main().
#define XAIETILE_STRSW_MPORT_CORE | ( | TileInstPtr, | |
Idx | |||
) | (XAIETILE_TILESTRSW_MPORT_CORE_OFF + Idx) |
Macro to compute the ID value of stream switch master port-Core.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_MPORT_CTRL | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch master port-Ctrl.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
Referenced by main().
#define XAIETILE_STRSW_MPORT_DMA | ( | TileInstPtr, | |
Idx | |||
) | (XAIETILE_TILESTRSW_MPORT_DMA_OFF + Idx) |
Macro to compute the ID value of stream switch master port-DMA.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
Referenced by main().
#define XAIETILE_STRSW_MPORT_EAST | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch master port-East.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_MPORT_FIFO | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch master port-FIFO.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_MPORT_NORTH | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch master port-North.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
Referenced by main().
#define XAIETILE_STRSW_MPORT_SOUTH | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch master port-South.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
Referenced by main().
#define XAIETILE_STRSW_MPORT_TRACE | ( | TileInstPtr, | |
Idx | |||
) | (XAIETILE_TILESTRSW_MPORT_TRACE_OFF + Idx) |
Macro to compute the ID value of stream switch master port-Trace.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_MPORT_WEST | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch master port-West.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_SLVSLOT_CFG | ( | TileInstPtr, | |
Slave, | |||
SlotIdx, | |||
SlotId, | |||
SlotMask, | |||
SlotEnable, | |||
SlotMsel, | |||
SlotArbiter | |||
) |
Macro to frame the configuration word for the slave port slot register.
TileInstPtr | - Pointer to the Tile instance. |
Slave | - Slave port ID value. |
SlotIdx | - Slave slot ID value, ranging from 0-3. |
SlotId | - Slot ID value. |
SlotMask | - Slot mask value. |
SlotEnable | - Slot enable (1-Enable,0-Disable). |
SlotMsel | - master select. |
SlotArbiter | - Arbiter to use. |
Referenced by main().
#define XAIETILE_STRSW_SPORT_CORE | ( | TileInstPtr, | |
Idx | |||
) | (XAIETILE_TILESTRSW_SPORT_CORE_OFF + Idx) |
Macro to compute the ID value of stream switch slave port-Core.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_SPORT_CTRL | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch slave port-Ctrl.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_SPORT_DMA | ( | TileInstPtr, | |
Idx | |||
) | (XAIETILE_TILESTRSW_SPORT_DMA_OFF + Idx) |
Macro to compute the ID value of stream switch slave port-DMA.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
Referenced by main().
#define XAIETILE_STRSW_SPORT_EAST | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch slave port-East.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_SPORT_FIFO | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch slave port-FIFO.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_SPORT_NORTH | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch slave port-North.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
Referenced by main().
#define XAIETILE_STRSW_SPORT_SOUTH | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch slave port-South.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
Referenced by main().
#define XAIETILE_STRSW_SPORT_TRACE | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch slave port-Trace.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
#define XAIETILE_STRSW_SPORT_WEST | ( | TileInstPtr, | |
Idx | |||
) |
Macro to compute the ID value of stream switch slave port-West.
TileInstPtr | - Tile instance pointer. |
Idx | - Index value. |
void XAieTile_ShimStrmDemuxConfig | ( | XAieGbl_Tile * | TileInstPtr, |
u32 | Port, | ||
u32 | Output | ||
) |
This API sets up the mux configuraiton for Shim DMA.
TileInstPtr | - Pointer to the Tile instance. |
Port,: | Should be one of XAIETILE_SHIM_STRM_DEM_SOUTH2, XAIETILE_SHIM_STRM_DEM_SOUTH3, XAIETILE_SHIM_STRM_DEM_SOUTH4, or XAIETILE_SHIM_STRM_DEM_SOUTH5 |
Output,: | Should be one of XAIETILE_SHIM_STRM_DEM_PL, XAIETILE_SHIM_STRM_DEM_DMA, or XAIETILE_SHIM_STRM_DEM_NOC. |
References XAieGbl_RegShimDemCfg::CtrlOff, XAieGbl_RegFldAttr::Lsb, XAieGbl_RegFldAttr::Mask, XAieGbl_RegShimDemCfg::Port, XAieGbl_Tile::TileAddr, and XAieGbl_Tile::TileType.
void XAieTile_ShimStrmMuxConfig | ( | XAieGbl_Tile * | TileInstPtr, |
u32 | Port, | ||
u32 | Input | ||
) |
This API sets up the mux configuraiton for Shim.
TileInstPtr | - Pointer to the Tile instance. |
Port,: | Should be one of XAIETILE_SHIM_STRM_MUX_SOUTH2, XAIETILE_SHIM_STRM_MUX_SOUTH3, XAIETILE_SHIM_STRM_MUX_SOUTH6, or XAIETILE_SHIM_STRM_MUX_SOUTH7 |
Input,: | Should be one of XAIETILE_SHIM_STRM_MUX_PL, XAIETILE_SHIM_STRM_MUX_DMA, or XAIETILE_SHIM_STRM_MUX_NOC. |
References XAieGbl_RegShimMuxCfg::CtrlOff, XAieGbl_RegFldAttr::Lsb, XAieGbl_RegFldAttr::Mask, XAieGbl_RegShimMuxCfg::Port, XAieGbl_Tile::TileAddr, and XAieGbl_Tile::TileType.
void XAieTile_StrmConfigMstr | ( | XAieGbl_Tile * | TileInstPtr, |
u8 | Master, | ||
u8 | Enable, | ||
u8 | PktEnable, | ||
u8 | Config | ||
) |
This API is used to configure the selected master port of the stream switch in the corresponding tile as per the parameters.
TileInstPtr | - Pointer to the Tile instance. |
Master | - Master port ID value. |
Enable | - Enable/Disable the master port (1-Enable,0-Disable). |
PktEnable | - Enable/Disable the packet switching mode (1-Enable,0-Disable). |
Config | - Config value to be used for circuit/packet sw. Applicable only when Enable==1. Bit encoding when PktEnable==1: 7-Drop header on packet, 6:3-Mask, 2:0-Arbiter Bit encoding when PktEnable==0: 7:5-Rsvd, 4:0-Slave port ID to which the master port need to connect to Use the macro "xaietile_strm.c::XAIETILE_STRSW_MPORT_CFGPKT()" to frame the 8-bit Config. |
References XAieGbl_RegStrmMstr::Config, XAieGbl_RegStrmMstr::DrpHdr, XAieGbl_RegFldAttr::Lsb, XAieGbl_RegFldAttr::Mask, XAieGbl_RegStrmMstr::MstrEn, XAieGbl_RegStrmMstr::PktEn, XAieGbl_RegStrmMstr::RegOff, XAieGbl_Tile::TileAddr, and XAieGbl_Tile::TileType.
Referenced by main(), and XAieTile_StrmConnectCct().
void XAieTile_StrmConfigSlv | ( | XAieGbl_Tile * | TileInstPtr, |
u8 | Slave, | ||
u8 | Enable, | ||
u8 | PktEnable | ||
) |
This API is used to configure the selected slave port of the stream switch in the corresponding tile.
TileInstPtr | - Pointer to the Tile instance. |
Slave | - Slave port ID value. |
Enable | - Enable/Disable the slave port (1-Enable,0-Disable). |
PktEnable | - Enable/Disable the packet switching mode (1-Enable,0-Disable). |
References XAieGbl_RegFldAttr::Lsb, XAieGbl_RegFldAttr::Mask, XAieGbl_RegStrmSlv::PktEn, XAieGbl_RegStrmSlv::RegOff, XAieGbl_RegStrmSlv::SlvEn, XAieGbl_Tile::TileAddr, and XAieGbl_Tile::TileType.
Referenced by main(), and XAieTile_StrmConnectCct().
void XAieTile_StrmConfigSlvSlot | ( | XAieGbl_Tile * | TileInstPtr, |
u8 | Slave, | ||
u8 | Slot, | ||
u8 | Enable, | ||
u32 | RegVal | ||
) |
This API is used to configure the selected slot of the slave port in the stream switch of the corresponding tile.
TileInstPtr | - Pointer to the Tile instance. |
Slave | - Slave port ID value. |
Slot | - Slave slot ID value, ranging from 0-3. |
Enable | - Enable/Disable the slave slot (1-Enable,0-Disable). |
RegVal | - Config value to be used for the slot. Applicable only when Enable==1, else set to 0. Bit encoding : 31:21-Rsvd, 28:24-Slot ID, 23:21-Rsvd, 20:16-ID mask, 15:6-Rsvd, 5:4-Master select/msel, 3-Rsvd, 2:0-Arbiter to use. Use the macro "xaietile_strm.c::XAIETILE_STRSW_SLVSLOT_CFG()" to frame the 32-bit RegVal. |
References XAieGbl_RegStrmSlot::En, XAieGbl_RegFldAttr::Lsb, XAieGbl_RegFldAttr::Mask, XAieGbl_RegStrmSlot::RegOff, XAieGbl_Tile::TileAddr, and XAieGbl_Tile::TileType.
Referenced by main().
void XAieTile_StrmConnectCct | ( | XAieGbl_Tile * | TileInstPtr, |
u8 | Slave, | ||
u8 | Master, | ||
u8 | SlvEnable | ||
) |
This API is used to connect the selected master port to the specified slave port of the stream switch.
TileInstPtr | - Pointer to the Tile instance. |
Slave | - slave port ID value. |
Master | - Master port ID value. |
SlvEnable | - Enable/Disable the slave port (1-Enable,0-Disable). |
References XAieTile_StrmConfigMstr(), and XAieTile_StrmConfigSlv().
Referenced by main().
void XAieTile_StrmEventPortSelect | ( | XAieGbl_Tile * | TileInstPtr, |
u8 | Port, | ||
u8 | Master, | ||
u8 | Id | ||
) |
This API sets up the event port in stream switch.
TileInstPtr | - Pointer to the Tile instance. |
Port,: | Port number. 0 to 7. |
Master,: | 1 for master. 0 for slave. |
Id,: | Port ID for event generation |
References XAieGbl_RegFldAttr::Lsb, XAieGbl_RegFldAttr::Mask, XAieGbl_RegStrmEvtPort::MstrSlv, XAieGbl_RegStrmEvtPort::Port, XAieGbl_RegStrmEvtPort::RegOff, XAieGbl_Tile::TileAddr, and XAieGbl_Tile::TileType.