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aiengine
Xilinx SDK Drivers API Documentation
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This typedef contains the attributes for Stream switch slave port config register. More...
Data Fields | |
u32 | RegOff |
Register offset. More... | |
XAieGbl_RegFldAttr | SlvEn |
Enable bit field attributes. More... | |
XAieGbl_RegFldAttr | PktEn |
Packet enable bit field attributes. More... | |
This typedef contains the attributes for Stream switch slave port config register.
XAieGbl_RegFldAttr XAieGbl_RegStrmSlv::PktEn |
Packet enable bit field attributes.
Referenced by XAieTile_StrmConfigSlv().
u32 XAieGbl_RegStrmSlv::RegOff |
Register offset.
Referenced by XAieTile_StrmConfigSlv().
XAieGbl_RegFldAttr XAieGbl_RegStrmSlv::SlvEn |
Enable bit field attributes.
Referenced by XAieTile_StrmConfigSlv().