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cfupmc
Xilinx SDK Drivers API Documentation
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(c) 2013 Xilinx Inc.
XREGDB v0.87 XREGCHDR v0.15
Generated on: 2018-02-16
This file contains confidential and proprietary information of Xilinx, Inc. and is protected under U.S. and international copyright and other intellectual property laws.
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CRITICAL APPLICATIONS Xilinx products are not designed or intended to be fail- safe, or for use in any application requiring fail-safe performance, such as life-support or safety devices or systems, Class III medical devices, nuclear facilities, applications related to the deployment of airbags, or any other applications that could lead to death, personal injury, or severe property or environmental damage (individually and collectively, "Critical Applications"). Customer assumes the sole risk and liability of any use of Xilinx products in Critical Applications, subject only to applicable laws and regulations governing limitations on product liability.
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Naming Convention: <MODULE>_<REGISTER>[_<FIELD>[_<DESC>]] <MODULE> Module name (e.g. can or usb) <REGISTER> Register within the current module [_<FIELD>] Bit field within a register [_<DESC>] Type of bit field define: SHIFT: Least significant bit for the field WIDTH: Size of field in bites MASK: A masking over a range of bits or a bit to be used for setting or clearing
Macros | |
#define | CFU_APB_BASEADDR 0XF12B0000 |
CFU_APB Base Address. More... | |
#define | CFU_APB_CFU_ISR ( ( CFU_APB_BASEADDR ) + 0X00000000 ) |
Register: CFU_APB_CFU_ISR. More... | |
#define | CFU_APB_CFU_IMR ( ( CFU_APB_BASEADDR ) + 0X00000004 ) |
Register: CFU_APB_CFU_IMR. More... | |
#define | CFU_APB_CFU_IER ( ( CFU_APB_BASEADDR ) + 0X00000008 ) |
Register: CFU_APB_CFU_IER. More... | |
#define | CFU_APB_CFU_IDR ( ( CFU_APB_BASEADDR ) + 0X0000000C ) |
Register: CFU_APB_CFU_IDR. More... | |
#define | CFU_APB_CFU_ITR ( ( CFU_APB_BASEADDR ) + 0X00000010 ) |
Register: CFU_APB_CFU_ITR. More... | |
#define | CFU_APB_CFU_PROTECT ( ( CFU_APB_BASEADDR ) + 0X00000014 ) |
Register: CFU_APB_CFU_PROTECT. More... | |
#define | CFU_APB_CFU_FGCR ( ( CFU_APB_BASEADDR ) + 0X00000018 ) |
Register: CFU_APB_CFU_FGCR. More... | |
#define | CFU_APB_CFU_CTL ( ( CFU_APB_BASEADDR ) + 0X0000001C ) |
Register: CFU_APB_CFU_CTL. More... | |
#define | CFU_APB_CFU_CRAM_RW ( ( CFU_APB_BASEADDR ) + 0X00000020 ) |
Register: CFU_APB_CFU_CRAM_RW. More... | |
#define | CFU_APB_CFU_MASK ( ( CFU_APB_BASEADDR ) + 0X00000028 ) |
Register: CFU_APB_CFU_MASK. More... | |
#define | CFU_APB_CFU_CRC_EXPECT ( ( CFU_APB_BASEADDR ) + 0X0000002C ) |
Register: CFU_APB_CFU_CRC_EXPECT. More... | |
#define | CFU_APB_CFU_CFRAME_LEFT_T0 ( ( CFU_APB_BASEADDR ) + 0X00000060 ) |
Register: CFU_APB_CFU_CFRAME_LEFT_T0. More... | |
#define | CFU_APB_CFU_CFRAME_LEFT_T1 ( ( CFU_APB_BASEADDR ) + 0X00000064 ) |
Register: CFU_APB_CFU_CFRAME_LEFT_T1. More... | |
#define | CFU_APB_CFU_CFRAME_LEFT_T2 ( ( CFU_APB_BASEADDR ) + 0X00000068 ) |
Register: CFU_APB_CFU_CFRAME_LEFT_T2. More... | |
#define | CFU_APB_CFU_ROW_RANGE ( ( CFU_APB_BASEADDR ) + 0X0000006C ) |
Register: CFU_APB_CFU_ROW_RANGE. More... | |
#define | CFU_APB_CFU_STATUS ( ( CFU_APB_BASEADDR ) + 0X00000100 ) |
Register: CFU_APB_CFU_STATUS. More... | |
#define | CFU_APB_CFU_INTERNAL_STATUS ( ( CFU_APB_BASEADDR ) + 0X00000104 ) |
Register: CFU_APB_CFU_INTERNAL_STATUS. More... | |
#define | CFU_APB_CFU_QWORD_CNT ( ( CFU_APB_BASEADDR ) + 0X00000108 ) |
Register: CFU_APB_CFU_QWORD_CNT. More... | |
#define | CFU_APB_CFU_CRC_LIVE ( ( CFU_APB_BASEADDR ) + 0X0000010C ) |
Register: CFU_APB_CFU_CRC_LIVE. More... | |
#define | CFU_APB_CFU_PENDING_READ_CNT ( ( CFU_APB_BASEADDR ) + 0X00000110 ) |
Register: CFU_APB_CFU_PENDING_READ_CNT. More... | |
#define | CFU_APB_CFU_FDRI_CNT ( ( CFU_APB_BASEADDR ) + 0X00000114 ) |
Register: CFU_APB_CFU_FDRI_CNT. More... | |
#define CFU_APB_BASEADDR 0XF12B0000 |
CFU_APB Base Address.
#define CFU_APB_CFU_CFRAME_LEFT_T0 ( ( CFU_APB_BASEADDR ) + 0X00000060 ) |
Register: CFU_APB_CFU_CFRAME_LEFT_T0.
#define CFU_APB_CFU_CFRAME_LEFT_T1 ( ( CFU_APB_BASEADDR ) + 0X00000064 ) |
Register: CFU_APB_CFU_CFRAME_LEFT_T1.
#define CFU_APB_CFU_CFRAME_LEFT_T2 ( ( CFU_APB_BASEADDR ) + 0X00000068 ) |
Register: CFU_APB_CFU_CFRAME_LEFT_T2.
#define CFU_APB_CFU_CRAM_RW ( ( CFU_APB_BASEADDR ) + 0X00000020 ) |
Register: CFU_APB_CFU_CRAM_RW.
#define CFU_APB_CFU_CRC_EXPECT ( ( CFU_APB_BASEADDR ) + 0X0000002C ) |
Register: CFU_APB_CFU_CRC_EXPECT.
Referenced by XCfupmc_CheckParam().
#define CFU_APB_CFU_CRC_LIVE ( ( CFU_APB_BASEADDR ) + 0X0000010C ) |
Register: CFU_APB_CFU_CRC_LIVE.
#define CFU_APB_CFU_CTL ( ( CFU_APB_BASEADDR ) + 0X0000001C ) |
Register: CFU_APB_CFU_CTL.
Referenced by XCfupmc_CfiErrHandler(), XCfupmc_CheckParam(), XCfupmc_ClearIgnoreCfiErr(), XCfupmc_ExtErrorHandler(), XCfupmc_Reset(), and XCfupmc_SetParam().
#define CFU_APB_CFU_FDRI_CNT ( ( CFU_APB_BASEADDR ) + 0X00000114 ) |
Register: CFU_APB_CFU_FDRI_CNT.
#define CFU_APB_CFU_FGCR ( ( CFU_APB_BASEADDR ) + 0X00000018 ) |
Register: CFU_APB_CFU_FGCR.
Referenced by XCfupmc_EndGlblSeq(), XCfupmc_GlblSeqInit(), XCfupmc_SetGlblSigEn(), XCfupmc_SetParam(), and XCfupmc_StartGlblSeq().
#define CFU_APB_CFU_IDR ( ( CFU_APB_BASEADDR ) + 0X0000000C ) |
Register: CFU_APB_CFU_IDR.
#define CFU_APB_CFU_IER ( ( CFU_APB_BASEADDR ) + 0X00000008 ) |
Register: CFU_APB_CFU_IER.
#define CFU_APB_CFU_IMR ( ( CFU_APB_BASEADDR ) + 0X00000004 ) |
Register: CFU_APB_CFU_IMR.
#define CFU_APB_CFU_INTERNAL_STATUS ( ( CFU_APB_BASEADDR ) + 0X00000104 ) |
Register: CFU_APB_CFU_INTERNAL_STATUS.
#define CFU_APB_CFU_ISR ( ( CFU_APB_BASEADDR ) + 0X00000000 ) |
Register: CFU_APB_CFU_ISR.
Referenced by XCfupmc_CfuErrHandler(), and XCfupmc_CheckParam().
#define CFU_APB_CFU_ITR ( ( CFU_APB_BASEADDR ) + 0X00000010 ) |
Register: CFU_APB_CFU_ITR.
Referenced by XCfupmc_SetParam().
#define CFU_APB_CFU_MASK ( ( CFU_APB_BASEADDR ) + 0X00000028 ) |
Register: CFU_APB_CFU_MASK.
Referenced by XCfupmc_MaskRegWrite().
#define CFU_APB_CFU_PENDING_READ_CNT ( ( CFU_APB_BASEADDR ) + 0X00000110 ) |
Register: CFU_APB_CFU_PENDING_READ_CNT.
#define CFU_APB_CFU_PROTECT ( ( CFU_APB_BASEADDR ) + 0X00000014 ) |
Register: CFU_APB_CFU_PROTECT.
Referenced by XCfupmc_CheckParam(), XCfupmc_EndGlblSeq(), XCfupmc_GlblSeqInit(), XCfupmc_SelfTest(), XCfupmc_SetGlblSigEn(), XCfupmc_SetParam(), and XCfupmc_StartGlblSeq().
#define CFU_APB_CFU_QWORD_CNT ( ( CFU_APB_BASEADDR ) + 0X00000108 ) |
Register: CFU_APB_CFU_QWORD_CNT.
#define CFU_APB_CFU_ROW_RANGE ( ( CFU_APB_BASEADDR ) + 0X0000006C ) |
Register: CFU_APB_CFU_ROW_RANGE.
#define CFU_APB_CFU_STATUS ( ( CFU_APB_BASEADDR ) + 0X00000100 ) |
Register: CFU_APB_CFU_STATUS.
Referenced by XCfupmc_WaitForStreamBusy().