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aiengine
Xilinx SDK Drivers API Documentation
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This file contains the instances of the register bit field definitions for the Core, Memory, NoC and PL module registers.
MODIFICATION HISTORY:
Ver Who Date Changes
1.0 Naresh 03/14/2018 Initial creation 1.1 Naresh 07/11/2018 Updated copyright info 1.2 Naresh 08/13/2018 Added Done attributes to CoreStsReg 1.3 Hyun 10/02/2018 Added performance counter registers 1.4 Hyun 10/02/2018 Added event registers 1.5 Hyun 10/03/2018 Added event port select registers 1.6 Hyun 10/12/2018 Added the colum reset register 1.7 Nishad 12/05/2018 Renamed ME attributes to AIE 1.8 Hyun 12/13/2018 Added the core PC event registers 1.9 Jubaer 02/26/2019 Add Group Event registers 2.0 Hyun 06/27/2019 Change CoreTimerReg to TimerReg