dp14
Xilinx SDK Drivers API Documentation
XDp_TxSinkConfig Struct Reference

This typedef contains configuration information about the RX device. More...

Data Fields

u8 DpcdRxCapsField [16]
 The first 16 bytes of the raw capabilities field of the RX device's DisplayPort Configuration Data (DPCD). More...
 
u8 LaneStatusAdjReqs [6]
 This is a raw read of the RX device's status registers. More...
 

Detailed Description

This typedef contains configuration information about the RX device.

Field Documentation

u8 XDp_TxSinkConfig::DpcdRxCapsField[16]

The first 16 bytes of the raw capabilities field of the RX device's DisplayPort Configuration Data (DPCD).

u8 XDp_TxSinkConfig::LaneStatusAdjReqs[6]

This is a raw read of the RX device's status registers.

The first 4 bytes correspond to the lane status associated with clock recovery, channel equalization, symbol lock, and interlane alignment. The remaining 2 bytes represent the pre-emphasis and voltage swing level adjustments requested by the RX device.