usbpsu
Xilinx SDK Drivers API Documentation
Usbpsu_v1_6

Data Structures

struct  XUsbPsu_EvtBuffer
 Software Event buffer representation. More...
 
struct  XUsbPsu_Trb
 Transfer Request Block - Hardware format. More...
 
struct  __attribute__
 USB Standard Control Request. More...
 
struct  XUsbPsu_Ep
 Endpoint representation. More...
 
struct  XUsbPsu_Config
 This typedef contains configuration information for the USB device. More...
 
struct  XUsbPsu
 USB Device Controller representation. More...
 
struct  XUsbPsu_Event_Epevt
 struct XUsbPsu_event_depvt - Device Endpoint Events : indicates this is an endpoint event : number of the endpoint : The event we have: 0x00 - Reserved 0x01 - XferComplete 0x02 - XferInProgress 0x03 - XferNotReady 0x04 - RxTxFifoEvt (IN->Underrun, OUT->Overrun) 0x05 - Reserved 0x06 - StreamEvt 0x07 - EPCmdCmplt : Reserved, don't use. More...
 
struct  XUsbPsu_Event_Devt
 struct XUsbPsu_event_devt - Device Events : indicates this is a non-endpoint event : indicates it's a device event. More...
 
struct  XUsbPsu_Event_Gevt
 struct XUsbPsu_event_gevt - Other Core Events : indicates this is a non-endpoint event (not used) : indicates it's (0x03) Carkit or (0x04) I2C event. More...
 
union  XUsbPsu_Event
 union XUsbPsu_event - representation of Event Buffer contents : raw 32-bit event : the type of the event : Device Endpoint Event : Device Event : Global Event More...
 

Macros

#define XUSBPSU_EP0_SETUP_PHASE   1U
 Setup Phase. More...
 
#define XUSBPSU_EP0_DATA_PHASE   2U
 Data Phase. More...
 
#define XUSBPSU_EP0_STATUS_PHASE   3U
 Status Pahse. More...
 
#define XUsbPsu_ReadReg(InstancePtr, Offset)   Xil_In32((InstancePtr)->ConfigPtr->BaseAddress + (u32)(Offset))
 Read a register of the USBPS8 device. More...
 
#define XUsbPsu_WriteReg(InstancePtr, Offset, Data)   Xil_Out32((InstancePtr)->ConfigPtr->BaseAddress + (u32)(Offset), (u32)(Data))
 Write a register of the USBPS8 device. More...
 
#define XUsbPsu_ReadVendorReg(Offset)   Xil_In32(VENDOR_BASE_ADDRESS + (u32)(Offset))
 Read a vendor register of the USBPS8 device. More...
 
#define XUsbPsu_WriteVendorReg(Offset, Data)   Xil_Out32(VENDOR_BASE_ADDRESS + (u32)(Offset), (u32)(Data))
 Write a Vendor register of the USBPS8 device. More...
 
#define XUsbPsu_ReadLpdReg(Offset)   Xil_In32(LPD_BASE_ADDRESS + (u32)(Offset))
 Read a LPD register of the USBPS8 device. More...
 
#define XUsbPsu_WriteLpdReg(Offset, Data)   Xil_Out32(LPD_BASE_ADDRESS + (u32)(Offset), (u32)(Data))
 Write a LPD register of the USBPS8 device. More...
 

Enumerations

enum  XusbPsuLinkState { XUSBPSU_LINK_STATE_U0 = 0x00U , XUSBPSU_LINK_STATE_U2 = 0x02U, XUSBPSU_LINK_STATE_U3 = 0x03U }
 
enum  XusbPsuLinkStateChange { XUSBPSU_LINK_STATE_CHANGE_U0 = 0x00U }
 

Functions

s32 XUsbPsu_Wait_Clear_Timeout (struct XUsbPsu *InstancePtr, u32 Offset, u32 BitMask, u32 Timeout)
 Waits until a bit in a register is cleared or timeout occurs. More...
 
s32 XUsbPsu_Wait_Set_Timeout (struct XUsbPsu *InstancePtr, u32 Offset, u32 BitMask, u32 Timeout)
 Waits until a bit in a register is set or timeout occurs. More...
 
void XUsbPsu_SetMode (struct XUsbPsu *InstancePtr, u32 Mode)
 Sets mode of Core to USB Device/Host/OTG. More...
 
void XUsbPsu_Idle (struct XUsbPsu *InstancePtr)
 This function puts the controller into idle state by stopping the transfers for all endpoints, stopping the usb core and clearing the event buffers. More...
 
void XUsbPsu_PhyReset (struct XUsbPsu *InstancePtr)
 Issues core PHY reset. More...
 
void XUsbPsu_EventBuffersSetup (struct XUsbPsu *InstancePtr)
 Sets up Event buffers so that events are written by Core. More...
 
void XUsbPsu_EventBuffersReset (struct XUsbPsu *InstancePtr)
 Resets Event buffer Registers to zero so that events are not written by Core. More...
 
u32 XUsbPsu_ReadHwParams (struct XUsbPsu *InstancePtr, u8 RegIndex)
 Reads data from Hardware Params Registers of Core. More...
 
s32 XUsbPsu_CoreInit (struct XUsbPsu *InstancePtr)
 Initializes Core. More...
 
void XUsbPsu_EnableIntr (struct XUsbPsu *InstancePtr, u32 Mask)
 Enables an interrupt in Event Enable RegValister. More...
 
void XUsbPsu_DisableIntr (struct XUsbPsu *InstancePtr, u32 Mask)
 Disables an interrupt in Event Enable RegValister. More...
 
s32 XUsbPsu_CfgInitialize (struct XUsbPsu *InstancePtr, XUsbPsu_Config *ConfigPtr, u32 BaseAddress)
 This function does the following: More...
 
s32 XUsbPsu_Start (struct XUsbPsu *InstancePtr)
 Starts the controller so that Host can detect this device. More...
 
s32 XUsbPsu_Stop (struct XUsbPsu *InstancePtr)
 Stops the controller so that Device disconnects from Host. More...
 
s32 XUsbPsu_SetTestMode (struct XUsbPsu *InstancePtr, u32 Mode)
 Enables USB2 Test Modes. More...
 
u8 XUsbPsu_GetLinkState (struct XUsbPsu *InstancePtr)
 Gets current State of USB Link. More...
 
s32 XUsbPsu_SetLinkState (struct XUsbPsu *InstancePtr, XusbPsuLinkStateChange State)
 Sets USB Link to a particular State. More...
 
void XUsbPsu_SetSpeed (struct XUsbPsu *InstancePtr, u32 Speed)
 Sets speed of the Core for connecting to Host. More...
 
s32 XUsbPsu_SetDeviceAddress (struct XUsbPsu *InstancePtr, u16 Addr)
 Sets Device Address of the Core. More...
 
s32 XUsbPsu_SetU1SleepTimeout (struct XUsbPsu *InstancePtr, u8 Sleep)
 Set U1 sleep timeout. More...
 
s32 XUsbPsu_SetU2SleepTimeout (struct XUsbPsu *InstancePtr, u8 Sleep)
 Set U2 sleep timeout. More...
 
s32 XUsbPsu_AcceptU1U2Sleep (struct XUsbPsu *InstancePtr)
 Enable Accept U1 and U2 sleep enable. More...
 
s32 XUsbPsu_U1SleepEnable (struct XUsbPsu *InstancePtr)
 Enable U1 enable sleep. More...
 
s32 XUsbPsu_U2SleepEnable (struct XUsbPsu *InstancePtr)
 Enable U2 enable sleep. More...
 
s32 XUsbPsu_U1SleepDisable (struct XUsbPsu *InstancePtr)
 Enable U1 disable sleep. More...
 
s32 XUsbPsu_U2SleepDisable (struct XUsbPsu *InstancePtr)
 Enable U2 disable sleep. More...
 
s32 XUsbPsu_IsSuperSpeed (struct XUsbPsu *InstancePtr)
 Checks if the current speed is Super Speed or not. More...
 
struct XUsbPsu_EpParams * XUsbPsu_GetEpParams (struct XUsbPsu *InstancePtr)
 Returns zeroed parameters to be used by Endpoint commands. More...
 
u32 XUsbPsu_EpGetTransferIndex (struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir)
 Returns Transfer Index assigned by Core for an Endpoint transfer. More...
 
s32 XUsbPsu_SendEpCmd (struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir, u32 Cmd, struct XUsbPsu_EpParams *Params)
 Sends Endpoint command to Endpoint. More...
 
s32 XUsbPsu_StartEpConfig (struct XUsbPsu *InstancePtr, u32 UsbEpNum, u8 Dir)
 Sends Start New Configuration command to Endpoint. More...
 
s32 XUsbPsu_SetEpConfig (struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir, u16 Size, u8 Type, u8 Restore)
 Sends Set Endpoint Configuration command to Endpoint. More...
 
s32 XUsbPsu_SetXferResource (struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir)
 Sends Set Transfer Resource command to Endpoint. More...
 
s32 XUsbPsu_EpEnable (struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir, u16 Maxsize, u8 Type, u8 Restore)
 Enables Endpoint for sending/receiving data. More...
 
s32 XUsbPsu_EpDisable (struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir)
 Disables Endpoint. More...
 
s32 XUsbPsu_EnableControlEp (struct XUsbPsu *InstancePtr, u16 Size)
 Enables USB Control Endpoint i.e., EP0OUT and EP0IN of Core. More...
 
void XUsbPsu_InitializeEps (struct XUsbPsu *InstancePtr)
 Initializes Endpoints. More...
 
void XUsbPsu_StopTransfer (struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir, u8 Force)
 Stops transfer on Endpoint. More...
 
void XUsbPsu_SaveEndpointState (struct XUsbPsu *InstancePtr, struct XUsbPsu_Ep *Ept)
 Query endpoint state and save it in EpSavedState. More...
 
void XUsbPsu_ClearStalls (struct XUsbPsu *InstancePtr)
 Clears Stall on all endpoints. More...
 
s32 XUsbPsu_EpBufferSend (struct XUsbPsu *InstancePtr, u8 UsbEp, u8 *BufferPtr, u32 BufferLen)
 Initiates DMA to send data on endpoint to Host. More...
 
s32 XUsbPsu_EpBufferRecv (struct XUsbPsu *InstancePtr, u8 UsbEp, u8 *BufferPtr, u32 Length)
 Initiates DMA to receive data on Endpoint from Host. More...
 
void XUsbPsu_EpSetStall (struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir)
 Stalls an Endpoint. More...
 
void XUsbPsu_EpClearStall (struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir)
 Clears Stall on an Endpoint. More...
 
void XUsbPsu_SetEpHandler (struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir, void(*Handler)(void *, u32, u32))
 Sets an user handler to be called after data is sent/received by an Endpoint. More...
 
s32 XUsbPsu_IsEpStalled (struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir)
 Returns status of endpoint - Stalled or not. More...
 
void XUsbPsu_EpXferComplete (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Epevt *Event)
 Checks the Data Phase and calls user Endpoint handler. More...
 
void XUsbPsu_EpXferNotReady (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Epevt *Event)
 For Isochronous transfer, get the microframe time and calls respective Endpoint handler. More...
 
s32 XUsbPsu_RecvSetup (struct XUsbPsu *InstancePtr)
 Initiates DMA on Control Endpoint 0 to receive Setup packet. More...
 
void XUsbPsu_Ep0StallRestart (struct XUsbPsu *InstancePtr)
 Stalls Control Endpoint and restarts to receive Setup packet. More...
 
void XUsbPsu_Ep0DataDone (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Epevt *Event)
 Checks the Data Phase and calls user Endpoint handler. More...
 
void XUsbPsu_Ep0StatusDone (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Epevt *Event)
 Checks the Status Phase and starts next Control transfer. More...
 
void XUsbPsu_Ep0XferComplete (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Epevt *Event)
 Handles Transfer complete event of Control Endpoints EP0 OUT and EP0 IN. More...
 
s32 XUsbPsu_Ep0StartStatus (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Epevt *Event)
 Starts Status Phase of Control Transfer. More...
 
void XUsbPsu_Ep0_EndControlData (struct XUsbPsu *InstancePtr, struct XUsbPsu_Ep *Ept)
 Ends Data Phase - used in case of error. More...
 
void XUsbPsu_Ep0XferNotReady (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Epevt *Event)
 Handles Transfer Not Ready event of Control Endpoints EP0 OUT and EP0 IN. More...
 
void XUsbPsu_Ep0Intr (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Epevt *Event)
 Handles Interrupts of Control Endpoints EP0 OUT and EP0 IN. More...
 
s32 XUsbPsu_Ep0Send (struct XUsbPsu *InstancePtr, u8 *BufferPtr, u32 BufferLen)
 Initiates DMA to send data on Control Endpoint EP0 IN to Host. More...
 
s32 XUsbPsu_Ep0Recv (struct XUsbPsu *InstancePtr, u8 *BufferPtr, u32 Length)
 Initiates DMA to receive data on Control Endpoint EP0 OUT from Host. More...
 
void XUsbSleep (u32 USeconds)
 API for Sleep routine. More...
 
void XUsbPsu_EpInterrupt (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Epevt *Event)
 Endpoint interrupt handler. More...
 
void XUsbPsu_DisconnectIntr (struct XUsbPsu *InstancePtr)
 Disconnect Interrupt handler. More...
 
void XUsbPsu_ResetIntr (struct XUsbPsu *InstancePtr)
 Reset Interrupt handler. More...
 
void XUsbPsu_ConnDoneIntr (struct XUsbPsu *InstancePtr)
 Connection Done Interrupt handler. More...
 
void XUsbPsu_LinkStsChangeIntr (struct XUsbPsu *InstancePtr, u32 EvtInfo)
 Link Status Change Interrupt handler. More...
 
void XUsbPsu_DevInterrupt (struct XUsbPsu *InstancePtr, const struct XUsbPsu_Event_Devt *Event)
 Interrupt handler for device specific events. More...
 
void XUsbPsu_EventHandler (struct XUsbPsu *InstancePtr, const union XUsbPsu_Event *Event)
 Processes an Event entry in Event Buffer. More...
 
void XUsbPsu_EventBufferHandler (struct XUsbPsu *InstancePtr)
 Processes events in an Event Buffer. More...
 
void XUsbPsu_IntrHandler (void *XUsbPsuInstancePtr)
 Main Interrupt Handler. More...
 
XUsbPsu_ConfigXUsbPsu_LookupConfig (u16 DeviceId)
 Lookup the device configuration based on the unique device ID. More...
 

Register offsets

The following constants provide access to each of the registers of the USBPSU device.

#define XUSBPSU_PORTSC_30   0x430U
 
#define XUSBPSU_PORTMSC_30   0x434U
 
#define XUSBPSU_GLOBALS_REGS_START   0xC100U
 
#define XUSBPSU_GLOBALS_REGS_END   0xC6FFU
 
#define XUSBPSU_DEVICE_REGS_START   0xC700U
 
#define XUSBPSU_DEVICE_REGS_END   0xCBFFU
 
#define XUSBPSU_OTG_REGS_START   0xCC00U
 
#define XUSBPSU_OTG_REGS_END   0xCCFFU
 
#define XUSBPSU_GSBUSCFG0   0xC100U
 
#define XUSBPSU_GSBUSCFG1   0xC104U
 
#define XUSBPSU_GTXTHRCFG   0xC108U
 
#define XUSBPSU_GRXTHRCFG   0xC10CU
 
#define XUSBPSU_GCTL   0xC110U
 
#define XUSBPSU_GEVTEN   0xC114U
 
#define XUSBPSU_GSTS   0xC118U
 
#define XUSBPSU_GSNPSID   0xC120U
 
#define XUSBPSU_GGPIO   0xC124U
 
#define XUSBPSU_GUID   0xC128U
 
#define XUSBPSU_GUCTL   0xC12CU
 
#define XUSBPSU_GBUSERRADDR0   0xC130U
 
#define XUSBPSU_GBUSERRADDR1   0xC134U
 
#define XUSBPSU_GPRTBIMAP0   0xC138U
 
#define XUSBPSU_GPRTBIMAP1   0xC13CU
 
#define XUSBPSU_GHWPARAMS0_OFFSET   0xC140U
 
#define XUSBPSU_GHWPARAMS1_OFFSET   0xC144U
 
#define XUSBPSU_GHWPARAMS2_OFFSET   0xC148U
 
#define XUSBPSU_GHWPARAMS3_OFFSET   0xC14CU
 
#define XUSBPSU_GHWPARAMS4_OFFSET   0xC150U
 
#define XUSBPSU_GHWPARAMS5_OFFSET   0xC154U
 
#define XUSBPSU_GHWPARAMS6_OFFSET   0xC158U
 
#define XUSBPSU_GHWPARAMS7_OFFSET   0xC15CU
 
#define XUSBPSU_GDBGFIFOSPACE   0xC160U
 
#define XUSBPSU_GDBGLTSSM   0xC164U
 
#define XUSBPSU_GPRTBIMAP_HS0   0xC180U
 
#define XUSBPSU_GPRTBIMAP_HS1   0xC184U
 
#define XUSBPSU_GPRTBIMAP_FS0   0xC188U
 
#define XUSBPSU_GPRTBIMAP_FS1   0xC18CU
 
#define XUSBPSU_GUSB2PHYCFG(n)   ((u32)0xc200 + ((u32)(n) * (u32)0x04))
 
#define XUSBPSU_GUSB2I2CCTL(n)   ((u32)0xc240 + ((u32)(n) * (u32)0x04))
 
#define XUSBPSU_GUSB2PHYACC(n)   ((u32)0xc280 + ((u32)(n) * (u32)0x04))
 
#define XUSBPSU_GUSB3PIPECTL(n)   ((u32)0xc2c0 + ((u32)(n) * (u32)0x04))
 
#define XUSBPSU_GTXFIFOSIZ(n)   ((u32)0xc300 + ((u32)(n) * (u32)0x04))
 
#define XUSBPSU_GRXFIFOSIZ(n)   ((u32)0xc380 + ((u32)(n) * (u32)0x04))
 
#define XUSBPSU_GEVNTADRLO(n)   ((u32)0xc400 + ((u32)(n) * (u32)0x10))
 
#define XUSBPSU_GEVNTADRHI(n)   ((u32)0xc404 + ((u32)(n) * (u32)0x10))
 
#define XUSBPSU_GEVNTSIZ(n)   ((u32)0xc408 + ((u32)(n) * (u32)0x10))
 
#define XUSBPSU_GEVNTCOUNT(n)   ((u32)0xc40c + ((u32)(n) * (u32)0x10))
 
#define XUSBPSU_GHWPARAMS8   0x0000c600U
 
#define XUSBPSU_DCFG   0x0000c700U
 
#define XUSBPSU_DCTL   0x0000c704U
 
#define XUSBPSU_DEVTEN   0x0000c708U
 
#define XUSBPSU_DSTS   0x0000c70cU
 
#define XUSBPSU_DGCMDPAR   0x0000c710U
 
#define XUSBPSU_DGCMD   0x0000c714U
 
#define XUSBPSU_DALEPENA   0x0000c720U
 
#define XUSBPSU_DEPCMDPAR2(n)   ((u32)0xc800 + ((u32)n * (u32)0x10U))
 
#define XUSBPSU_DEPCMDPAR1(n)   ((u32)0xc804 + ((u32)n * (u32)0x10U))
 
#define XUSBPSU_DEPCMDPAR0(n)   ((u32)0xc808 + ((u32)n * (u32)0x10U))
 
#define XUSBPSU_DEPCMD(n)   ((u32)0xc80c + ((u32)n * (u32)0x10U))
 
#define XUSBPSU_OCFG   0x0000cc00U
 
#define XUSBPSU_OCTL   0x0000cc04U
 
#define XUSBPSU_OEVT   0xcc08U
 
#define XUSBPSU_OEVTEN   0xcc0CU
 
#define XUSBPSU_OSTS   0xcc10U
 
#define XUSBPSU_GCTL_PWRDNSCALE(n)   ((n) << 19U)
 
#define XUSBPSU_GCTL_U2RSTECN   (1U << 16U)
 
#define XUSBPSU_GCTL_RAMCLKSEL(x)   (((x) & XUSBPSU_GCTL_CLK_MASK) << 6U)
 
#define XUSBPSU_GCTL_CLK_BUS   (0U)
 
#define XUSBPSU_GCTL_CLK_PIPE   (1U)
 
#define XUSBPSU_GCTL_CLK_PIPEHALF   (2U)
 
#define XUSBPSU_GCTL_CLK_MASK   (3U)
 
#define XUSBPSU_GCTL_PRTCAP(n)   (((n) & (3U << 12U)) >> 12U)
 
#define XUSBPSU_GCTL_PRTCAPDIR(n)   ((n) << 12U)
 
#define XUSBPSU_GCTL_PRTCAP_HOST   1U
 
#define XUSBPSU_GCTL_PRTCAP_DEVICE   2U
 
#define XUSBPSU_GCTL_PRTCAP_OTG   3U
 
#define XUSBPSU_GCTL_CORESOFTRESET   (0x00000001U << 11U)
 
#define XUSBPSU_GCTL_SOFITPSYNC   (0x00000001U << 10U)
 
#define XUSBPSU_GCTL_SCALEDOWN(n)   ((u32)(n) << 4U)
 
#define XUSBPSU_GCTL_SCALEDOWN_MASK   XUSBPSU_GCTL_SCALEDOWN(3U)
 
#define XUSBPSU_GCTL_DISSCRAMBLE   (0x00000001U << 3U)
 
#define XUSBPSU_GCTL_U2EXIT_LFPS   (0x00000001U << 2U)
 
#define XUSBPSU_GCTL_GBLHIBERNATIONEN   (0x00000001U << 1U)
 
#define XUSBPSU_GCTL_DSBLCLKGTNG   (0x00000001U << 0U)
 
#define XUSBPSU_GSTS_DEVICE_IP_MASK   0x00000040U
 
#define XUSBPSU_GSTS_CUR_MODE   (0x00000001U << 0U)
 
#define XUSBPSU_GUSB2PHYCFG_PHYSOFTRST   (0x00000001U << 31U)
 
#define XUSBPSU_GUSB2PHYCFG_SUSPHY   (0x00000001U << 6U)
 
#define XUSBPSU_GUSB3PIPECTL_PHYSOFTRST   (0x00000001U << 31U)
 
#define XUSBPSU_GUSB3PIPECTL_SUSPHY   (0x00000001U << 17U)
 
#define XUSBPSU_GTXFIFOSIZ_TXFDEF(n)   ((u32)(n) & (u32)0xffffU)
 
#define XUSBPSU_GTXFIFOSIZ_TXFSTADDR(n)   ((u32)(n) & 0xffff0000U)
 
#define XUSBPSU_GEVNTSIZ_INTMASK   ((u32)0x00000001U << 31U)
 
#define XUSBPSU_GEVNTSIZ_SIZE(n)   ((u32)(n) & (u32)0xffffU)
 
#define XUSBPSU_GHWPARAMS1_EN_PWROPT(n)   (((u32)(n) & ((u32)3 << 24U)) >> 24U)
 
#define XUSBPSU_GHWPARAMS1_EN_PWROPT_NO   0U
 
#define XUSBPSU_GHWPARAMS1_EN_PWROPT_CLK   1U
 
#define XUSBPSU_GHWPARAMS1_EN_PWROPT_HIB   2U
 
#define XUSBPSU_GHWPARAMS1_PWROPT(n)   ((u32)(n) << 24U)
 
#define XUSBPSU_GHWPARAMS1_PWROPT_MASK   XUSBPSU_GHWPARAMS1_PWROPT(3U)
 
#define XUSBPSU_GHWPARAMS4_HIBER_SCRATCHBUFS(n)   (((u32)(n) & ((u32)0x0F << 13U)) >> 13U)
 
#define XUSBPSU_MAX_HIBER_SCRATCHBUFS   15U
 
#define XUSBPSU_DCFG_DEVADDR(addr)   ((u32)(addr) << 3U)
 
#define XUSBPSU_DCFG_DEVADDR_MASK   XUSBPSU_DCFG_DEVADDR(0x7FU)
 
#define XUSBPSU_DCFG_SPEED_MASK   7U
 
#define XUSBPSU_DCFG_SUPERSPEED   4U
 
#define XUSBPSU_DCFG_HIGHSPEED   0U
 
#define XUSBPSU_DCFG_FULLSPEED2   1U
 
#define XUSBPSU_DCFG_LOWSPEED   2U
 
#define XUSBPSU_DCFG_FULLSPEED1   3U
 
#define XUSBPSU_DCFG_LPM_CAP   (0x00000001U << 22U)
 
#define XUSBPSU_DCTL_RUN_STOP   (0x00000001U << 31U)
 
#define XUSBPSU_DCTL_CSFTRST   ((u32)0x00000001U << 30U)
 
#define XUSBPSU_DCTL_LSFTRST   (0x00000001U << 29U)
 
#define XUSBPSU_DCTL_HIRD_THRES_MASK   (0x0000001fU << 24U)
 
#define XUSBPSU_DCTL_HIRD_THRES(n)   ((u32)(n) << 24U)
 
#define XUSBPSU_DCTL_APPL1RES   (0x00000001U << 23U)
 
#define XUSBPSU_DCTL_TRGTULST_MASK   (0x0000000FU << 17U)
 
#define XUSBPSU_DCTL_TRGTULST(n)   ((u32)(n) << 17U)
 
#define XUSBPSU_DCTL_TRGTULST_U2   (XUSBPSU_DCTL_TRGTULST(2U))
 
#define XUSBPSU_DCTL_TRGTULST_U3   (XUSBPSU_DCTL_TRGTULST(3U))
 
#define XUSBPSU_DCTL_TRGTULST_SS_DIS   (XUSBPSU_DCTL_TRGTULST(4U))
 
#define XUSBPSU_DCTL_TRGTULST_RX_DET   (XUSBPSU_DCTL_TRGTULST(5U))
 
#define XUSBPSU_DCTL_TRGTULST_SS_INACT   (XUSBPSU_DCTL_TRGTULST(6U))
 
#define XUSBPSU_DCTL_KEEP_CONNECT   (0x00000001U << 19U)
 
#define XUSBPSU_DCTL_L1_HIBER_EN   (0x00000001U << 18U)
 
#define XUSBPSU_DCTL_CRS   (0x00000001U << 17U)
 
#define XUSBPSU_DCTL_CSS   (0x00000001U << 16U)
 
#define XUSBPSU_DCTL_INITU2ENA   (0x00000001U << 12U)
 
#define XUSBPSU_DCTL_ACCEPTU2ENA   (0x00000001U << 11U)
 
#define XUSBPSU_DCTL_INITU1ENA   (0x00000001U << 10U)
 
#define XUSBPSU_DCTL_ACCEPTU1ENA   (0x00000001U << 9U)
 
#define XUSBPSU_DCTL_TSTCTRL_MASK   (0x0000000fU << 1U)
 
#define XUSBPSU_DCTL_ULSTCHNGREQ_MASK   (0x0000000FU << 5U)
 
#define XUSBPSU_DCTL_ULSTCHNGREQ(n)   (((u32)(n) << 5U) & XUSBPSU_DCTL_ULSTCHNGREQ_MASK)
 
#define XUSBPSU_DCTL_ULSTCHNG_NO_ACTION   (XUSBPSU_DCTL_ULSTCHNGREQ(0U))
 
#define XUSBPSU_DCTL_ULSTCHNG_SS_DISABLED   (XUSBPSU_DCTL_ULSTCHNGREQ(4U))
 
#define XUSBPSU_DCTL_ULSTCHNG_RX_DETECT   (XUSBPSU_DCTL_ULSTCHNGREQ(5U))
 
#define XUSBPSU_DCTL_ULSTCHNG_SS_INACTIVE   (XUSBPSU_DCTL_ULSTCHNGREQ(6U))
 
#define XUSBPSU_DCTL_ULSTCHNG_RECOVERY   (XUSBPSU_DCTL_ULSTCHNGREQ(8U))
 
#define XUSBPSU_DCTL_ULSTCHNG_COMPLIANCE   (XUSBPSU_DCTL_ULSTCHNGREQ(10U))
 
#define XUSBPSU_DCTL_ULSTCHNG_LOOPBACK   (XUSBPSU_DCTL_ULSTCHNGREQ(11U))
 
#define XUSBPSU_DEVTEN_VNDRDEVTSTRCVEDEN   ((u32)0x00000001U << 12U)
 
#define XUSBPSU_DEVTEN_EVNTOVERFLOWEN   ((u32)0x00000001U << 11U)
 
#define XUSBPSU_DEVTEN_CMDCMPLTEN   ((u32)0x00000001U << 10U)
 
#define XUSBPSU_DEVTEN_ERRTICERREN   ((u32)0x00000001U << 9U)
 
#define XUSBPSU_DEVTEN_SOFEN   ((u32)0x00000001U << 7U)
 
#define XUSBPSU_DEVTEN_EOPFEN   ((u32)0x00000001U << 6U)
 
#define XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN   ((u32)0x00000001U << 5U)
 
#define XUSBPSU_DEVTEN_WKUPEVTEN   ((u32)0x00000001U << 4U)
 
#define XUSBPSU_DEVTEN_ULSTCNGEN   ((u32)0x00000001U << 3U)
 
#define XUSBPSU_DEVTEN_CONNECTDONEEN   ((u32)0x00000001U << 2U)
 
#define XUSBPSU_DEVTEN_USBRSTEN   ((u32)0x00000001U << 1U)
 
#define XUSBPSU_DEVTEN_DISCONNEVTEN   ((u32)0x00000001U << 0U)
 
#define XUSBPSU_DSTS_DCNRD   (0x00000001U << 29U)
 
#define XUSBPSU_DSTS_PWRUPREQ   (0x00000001U << 24U)
 
#define XUSBPSU_DSTS_RSS   (0x00000001U << 25U)
 
#define XUSBPSU_DSTS_SSS   (0x00000001U << 24U)
 
#define XUSBPSU_DSTS_COREIDLE   (0x00000001U << 23U)
 
#define XUSBPSU_DSTS_DEVCTRLHLT   (0x00000001U << 22U)
 
#define XUSBPSU_DSTS_USBLNKST_MASK   (0x0000000FU << 18U)
 
#define XUSBPSU_DSTS_USBLNKST(n)   (((u32)(n) & XUSBPSU_DSTS_USBLNKST_MASK) >> 18U)
 
#define XUSBPSU_DSTS_RXFIFOEMPTY   (0x00000001U << 17U)
 
#define XUSBPSU_DSTS_SOFFN_MASK   (0x00003FFFU << 3U)
 
#define XUSBPSU_DSTS_SOFFN(n)   (((u32)(n) & XUSBPSU_DSTS_SOFFN_MASK) >> 3U)
 
#define XUSBPSU_DSTS_CONNECTSPD   (0x00000007U << 0U)
 
#define XUSBPSU_DSTS_SUPERSPEED   (4U << 0U)
 
#define XUSBPSU_DSTS_HIGHSPEED   (0U << 0U)
 
#define XUSBPSU_DSTS_FULLSPEED2   (1U << 0U)
 
#define XUSBPSU_DSTS_LOWSPEED   (2U << 0U)
 
#define XUSBPSU_DSTS_FULLSPEED1   (3U << 0U)
 
#define XUSBPSU_GSBUSCFG0_BITMASK   0xFFFF0000U
 
#define XUSBPSU_PORTMSC_30_FLA_MASK   (1U << 16U)
 
#define XUSBPSU_PORTMSC_30_U2_TIMEOUT_MASK   (0xFFU << 8U)
 
#define XUSBPSU_PORTMSC_30_U2_TIMEOUT_SHIFT   (8U)
 
#define XUSBPSU_PORTMSC_30_U1_TIMEOUT_MASK   (0xFFU << 0U)
 
#define XUSBPSU_PORTMSC_30_U1_TIMEOUT_SHIFT   (0U)
 
#define RST_LPD_TOP   0x23CU
 
#define USB0_CORE_RST   (1U << 6U)
 
#define USB1_CORE_RST   (1U << 7U)
 
#define XIL_CUR_PWR_STATE   0x00U
 
#define XIL_PME_ENABLE   0x34U
 
#define XIL_REQ_PWR_STATE   0x3CU
 
#define XIL_PWR_CONFIG_USB3   0x48U
 
#define XIL_REQ_PWR_STATE_D0   0U
 
#define XIL_REQ_PWR_STATE_D3   3U
 
#define XIL_PME_ENABLE_SIG_GEN   1U
 
#define XIL_CUR_PWR_STATE_D0   0U
 
#define XIL_CUR_PWR_STATE_D3   3U
 
#define XIL_CUR_PWR_STATE_BITMASK   0x03U
 
#define VENDOR_BASE_ADDRESS   0xFF9D0000U
 
#define LPD_BASE_ADDRESS   0xFF5E0000U
 

Macro Definition Documentation

#define XUSBPSU_EP0_DATA_PHASE   2U
#define XUSBPSU_EP0_SETUP_PHASE   1U
#define XUSBPSU_EP0_STATUS_PHASE   3U

Status Pahse.

Referenced by XUsbPsu_Ep0StartStatus(), and XUsbPsu_Ep0XferComplete().

#define XUsbPsu_ReadLpdReg (   Offset)    Xil_In32(LPD_BASE_ADDRESS + (u32)(Offset))

Read a LPD register of the USBPS8 device.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Offsetis the offset of the register to read.
Returns
The contents of the register.
Note
C-style Signature: u32 XUsbPsu_ReadLpdReg(struct XUsbPsu *InstancePtr, u32 Offset);
#define XUsbPsu_ReadVendorReg (   Offset)    Xil_In32(VENDOR_BASE_ADDRESS + (u32)(Offset))

Read a vendor register of the USBPS8 device.

Parameters
Offsetis the offset of the register to read.
Returns
The contents of the register.
Note
C-style Signature: u32 XUsbPsu_ReadVendorReg(struct XUsbPsu *InstancePtr, u32 Offset);
#define XUsbPsu_WriteLpdReg (   Offset,
  Data 
)    Xil_Out32(LPD_BASE_ADDRESS + (u32)(Offset), (u32)(Data))

Write a LPD register of the USBPS8 device.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
RegOffsetis the offset of the register to write.
Datais the value to write to the register.
Returns
None.
Note
C-style Signature: void XUsbPsu_WriteLpdReg(struct XUsbPsu *InstancePtr, u32 Offset,u32 Data)
#define XUsbPsu_WriteReg (   InstancePtr,
  Offset,
  Data 
)    Xil_Out32((InstancePtr)->ConfigPtr->BaseAddress + (u32)(Offset), (u32)(Data))

Write a register of the USBPS8 device.

This macro provides register access to all registers using the register offsets defined above.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
RegOffsetis the offset of the register to write.
Datais the value to write to the register.
Returns
None.
Note
C-style Signature: void XUsbPsu_WriteReg(struct XUsbPsu *InstancePtr, u32 Offset,u32 Data)

Referenced by XUsbPsu_AcceptU1U2Sleep(), XUsbPsu_ConnDoneIntr(), XUsbPsu_CoreInit(), XUsbPsu_DisableIntr(), XUsbPsu_DisconnectIntr(), XUsbPsu_EnableIntr(), XUsbPsu_EpDisable(), XUsbPsu_EpEnable(), XUsbPsu_EventBufferHandler(), XUsbPsu_EventBuffersReset(), XUsbPsu_EventBuffersSetup(), XUsbPsu_Idle(), XUsbPsu_IntrHandler(), XUsbPsu_PhyReset(), XUsbPsu_ResetIntr(), XUsbPsu_SendEpCmd(), XUsbPsu_SetDeviceAddress(), XUsbPsu_SetLinkState(), XUsbPsu_SetMode(), XUsbPsu_SetSpeed(), XUsbPsu_SetTestMode(), XUsbPsu_SetU1SleepTimeout(), XUsbPsu_SetU2SleepTimeout(), XUsbPsu_Start(), XUsbPsu_Stop(), XUsbPsu_U1SleepDisable(), XUsbPsu_U1SleepEnable(), XUsbPsu_U2SleepDisable(), and XUsbPsu_U2SleepEnable().

#define XUsbPsu_WriteVendorReg (   Offset,
  Data 
)    Xil_Out32(VENDOR_BASE_ADDRESS + (u32)(Offset), (u32)(Data))

Write a Vendor register of the USBPS8 device.

Parameters
RegOffsetis the offset of the register to write.
Datais the value to write to the register.
Returns
None.
Note
C-style Signature: void XUsbPsu_WriteVendorReg(struct XUsbPsu *InstancePtr, u32 Offset,u32 Data)

Enumeration Type Documentation

Enumerator
XUSBPSU_LINK_STATE_U0 

in HS - ON

XUSBPSU_LINK_STATE_U2 

in HS - SLEEP

XUSBPSU_LINK_STATE_U3 

in HS - SUSPEND

Enumerator
XUSBPSU_LINK_STATE_CHANGE_U0 

in HS - ON

Function Documentation

s32 XUsbPsu_AcceptU1U2Sleep ( struct XUsbPsu InstancePtr)

Enable Accept U1 and U2 sleep enable.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

s32 XUsbPsu_CfgInitialize ( struct XUsbPsu InstancePtr,
XUsbPsu_Config ConfigPtr,
u32  BaseAddress 
)

This function does the following:

  - initializes a specific XUsbPsu instance.
  - sets up Event Buffer for Core to write events.
  - Core Reset and PHY Reset.
  - Sets core in Device Mode.
  - Sets default speed as HIGH_SPEED.
  - Sets Device Address to 0.
  - Enables interrupts.
Parameters
InstancePtris a pointer to the XUsbPsu instance.
ConfigPtrpoints to the XUsbPsu device configuration structure.
BaseAddressis the device base address in the virtual memory address space. If the address translation is not used then the physical address is passed. Unexpected errors may occur if the address mapping is changed after this function is invoked.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu::ConfigPtr, XUsbPsu_Config::EnableSuperSpeed, XUsbPsu_CoreInit(), XUsbPsu_EventBuffersSetup(), XUsbPsu_InitializeEps(), XUsbPsu_ReadHwParams(), XUsbPsu_SetDeviceAddress(), XUsbPsu_SetMode(), and XUsbPsu_SetSpeed().

void XUsbPsu_ClearStalls ( struct XUsbPsu InstancePtr)

Clears Stall on all endpoints.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
None.
Note
None.

References XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Ep::UsbEpNum, XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

void XUsbPsu_ConnDoneIntr ( struct XUsbPsu InstancePtr)

Connection Done Interrupt handler.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
None.
Note
None.

References XUsbPsu::HasHibernation, XUsbPsu_EnableControlEp(), XUsbPsu_ReadReg, XUsbPsu_RecvSetup(), and XUsbPsu_WriteReg.

Referenced by XUsbPsu_DevInterrupt().

s32 XUsbPsu_CoreInit ( struct XUsbPsu InstancePtr)

Initializes Core.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
Returns
-XST_SUCCESS if initialization was successful -XST_FAILURE if initialization was not successful

References XUsbPsu::ConfigPtr, XUsbPsu::HasHibernation, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_PhyReset(), XUsbPsu_ReadHwParams(), XUsbPsu_ReadReg, XUsbPsu_Wait_Clear_Timeout(), and XUsbPsu_WriteReg.

Referenced by XUsbPsu_CfgInitialize().

void XUsbPsu_DevInterrupt ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Devt Event 
)

Interrupt handler for device specific events.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis the Device Event occurred in core.
Returns
None.
Note
None.

References XUsbPsu::HasHibernation, XUsbPsu_ConnDoneIntr(), XUsbPsu_DisconnectIntr(), XUsbPsu_LinkStsChangeIntr(), and XUsbPsu_ResetIntr().

Referenced by XUsbPsu_EventHandler().

void XUsbPsu_DisableIntr ( struct XUsbPsu InstancePtr,
u32  Mask 
)

Disables an interrupt in Event Enable RegValister.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
Maskis the OR of Interrupt Enable Masks
  • XUSBPSU_DEVTEN_VNDRDEVTSTRCVEDEN
  • XUSBPSU_DEVTEN_EVNTOVERFLOWEN
  • XUSBPSU_DEVTEN_CMDCMPLTEN
  • XUSBPSU_DEVTEN_ERRTICERREN
  • XUSBPSU_DEVTEN_SOFEN
  • XUSBPSU_DEVTEN_EOPFEN
  • XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN
  • XUSBPSU_DEVTEN_WKUPEVTEN
  • XUSBPSU_DEVTEN_ULSTCNGEN
  • XUSBPSU_DEVTEN_CONNECTDONEEN
  • XUSBPSU_DEVTEN_USBRSTEN
  • XUSBPSU_DEVTEN_DISCONNEVTEN
Returns
None

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

void XUsbPsu_DisconnectIntr ( struct XUsbPsu InstancePtr)

Disconnect Interrupt handler.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
None.
Note
None.

References XUsbPsu::HasHibernation, XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

Referenced by XUsbPsu_DevInterrupt().

s32 XUsbPsu_EnableControlEp ( struct XUsbPsu InstancePtr,
u16  Size 
)

Enables USB Control Endpoint i.e., EP0OUT and EP0IN of Core.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Sizeis control endpoint size.
Returns
XST_SUCCESS else XST_FAILURE.
Note
None.

References XUsbPsu_EpEnable().

Referenced by XUsbPsu_ConnDoneIntr().

void XUsbPsu_EnableIntr ( struct XUsbPsu InstancePtr,
u32  Mask 
)

Enables an interrupt in Event Enable RegValister.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on
Maskis the OR of any Interrupt Enable Masks:
  • XUSBPSU_DEVTEN_VNDRDEVTSTRCVEDEN
  • XUSBPSU_DEVTEN_EVNTOVERFLOWEN
  • XUSBPSU_DEVTEN_CMDCMPLTEN
  • XUSBPSU_DEVTEN_ERRTICERREN
  • XUSBPSU_DEVTEN_SOFEN
  • XUSBPSU_DEVTEN_EOPFEN
  • XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN
  • XUSBPSU_DEVTEN_WKUPEVTEN
  • XUSBPSU_DEVTEN_ULSTCNGEN
  • XUSBPSU_DEVTEN_CONNECTDONEEN
  • XUSBPSU_DEVTEN_USBRSTEN
  • XUSBPSU_DEVTEN_DISCONNEVTEN
Returns
None

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

Referenced by SetupInterruptSystem(), and UsbEnableEvent().

void XUsbPsu_Ep0_EndControlData ( struct XUsbPsu InstancePtr,
struct XUsbPsu_Ep Ept 
)

Ends Data Phase - used in case of error.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Depis a pointer to the Endpoint structure.
Returns
None
Note
None.

References XUsbPsu_Ep::Direction, XUsbPsu_Ep::ResourceIndex, XUsbPsu_Ep::UsbEpNum, XUsbPsu_GetEpParams(), XUsbPsu_SendEpCmd(), and XUsbSleep().

Referenced by XUsbPsu_Ep0XferNotReady().

void XUsbPsu_Ep0DataDone ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Epevt Event 
)

Checks the Data Phase and calls user Endpoint handler.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis a pointer to the Endpoint event occurred in core.
Returns
None.
Note
None.

References XUsbPsu_Ep::BufferPtr, XUsbPsu_Ep::BytesTxed, XUsbPsu::ConfigPtr, XUsbPsu::eps, XUsbPsu_Config::IsCacheCoherent, and XUsbPsu_Ep::RequestedBytes.

Referenced by XUsbPsu_Ep0XferComplete().

void XUsbPsu_Ep0Intr ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Epevt Event 
)

Handles Interrupts of Control Endpoints EP0 OUT and EP0 IN.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis a pointer to the Endpoint event occurred in core.
Returns
None.
Note
None.

References XUsbPsu_Ep0XferComplete(), and XUsbPsu_Ep0XferNotReady().

Referenced by XUsbPsu_EpInterrupt().

s32 XUsbPsu_Ep0Recv ( struct XUsbPsu InstancePtr,
u8 *  BufferPtr,
u32  Length 
)

Initiates DMA to receive data on Control Endpoint EP0 OUT from Host.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
BufferPtris pointer to data.
Lengthis Length of data to be received.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_Ep::BufferPtr, XUsbPsu_Ep::BytesTxed, XUsbPsu::ConfigPtr, XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_Ep::MaxSize, XUsbPsu_Ep::RequestedBytes, XUsbPsu_Ep::ResourceIndex, XUsbPsu_Ep::UsbEpNum, XUSBPSU_EP0_DATA_PHASE, XUsbPsu_EpGetTransferIndex(), XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

Referenced by XUsbPsu_EpBufferRecv().

s32 XUsbPsu_Ep0Send ( struct XUsbPsu InstancePtr,
u8 *  BufferPtr,
u32  BufferLen 
)

Initiates DMA to send data on Control Endpoint EP0 IN to Host.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
BufferPtris pointer to data.
BufferLenis Length of data buffer.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_Ep::BufferPtr, XUsbPsu_Ep::BytesTxed, XUsbPsu::ConfigPtr, XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_Ep::RequestedBytes, XUsbPsu_Ep::ResourceIndex, XUsbPsu_Ep::UsbEpNum, XUSBPSU_EP0_DATA_PHASE, XUsbPsu_EpGetTransferIndex(), XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

Referenced by XUsbPsu_EpBufferSend().

void XUsbPsu_Ep0StallRestart ( struct XUsbPsu InstancePtr)

Stalls Control Endpoint and restarts to receive Setup packet.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
None
Note
None.

References XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUSBPSU_EP0_SETUP_PHASE, XUsbPsu_EpSetStall(), and XUsbPsu_RecvSetup().

Referenced by XUsbPsu_Ep0StatusDone(), and XUsbPsu_Ep0XferNotReady().

s32 XUsbPsu_Ep0StartStatus ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Epevt Event 
)

Starts Status Phase of Control Transfer.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis a pointer to the Endpoint event occurred in core.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu::ConfigPtr, XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_Ep::ResourceIndex, XUsbPsu_Ep::UsbEpNum, XUSBPSU_EP0_STATUS_PHASE, XUsbPsu_EpGetTransferIndex(), XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

Referenced by XUsbPsu_Ep0XferNotReady().

void XUsbPsu_Ep0StatusDone ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Epevt Event 
)

Checks the Status Phase and starts next Control transfer.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis a pointer to the Endpoint event occurred in core.
Returns
None.
Note
None.

References XUsbPsu::ConfigPtr, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_Ep0StallRestart(), XUsbPsu_RecvSetup(), and XUsbPsu_SetTestMode().

Referenced by XUsbPsu_Ep0XferComplete().

void XUsbPsu_Ep0XferComplete ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Epevt Event 
)

Handles Transfer complete event of Control Endpoints EP0 OUT and EP0 IN.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis a pointer to the Endpoint event occurred in core.
Returns
None.
Note
None.

References XUsbPsu::ConfigPtr, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_Ep::ResourceIndex, XUSBPSU_EP0_DATA_PHASE, XUSBPSU_EP0_SETUP_PHASE, XUSBPSU_EP0_STATUS_PHASE, XUsbPsu_Ep0DataDone(), and XUsbPsu_Ep0StatusDone().

Referenced by XUsbPsu_Ep0Intr().

void XUsbPsu_Ep0XferNotReady ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Epevt Event 
)

Handles Transfer Not Ready event of Control Endpoints EP0 OUT and EP0 IN.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis a pointer to the Endpoint event occurred in core.
Returns
None.
Note
None.

References XUsbPsu::eps, XUsbPsu_Ep0_EndControlData(), XUsbPsu_Ep0StallRestart(), and XUsbPsu_Ep0StartStatus().

Referenced by XUsbPsu_Ep0Intr().

s32 XUsbPsu_EpBufferRecv ( struct XUsbPsu InstancePtr,
u8  UsbEp,
u8 *  BufferPtr,
u32  Length 
)

Initiates DMA to receive data on Endpoint from Host.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpis USB endpoint number.
BufferPtris pointer to data.
Lengthis length of data to be received.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_Ep::BufferPtr, XUsbPsu_Ep::BytesTxed, XUsbPsu::ConfigPtr, XUsbPsu_Ep::CurUf, XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_Ep::MaxSize, XUsbPsu_Ep::RequestedBytes, XUsbPsu_Ep::ResourceIndex, XUsbPsu_Ep::Type, XUsbPsu_Ep::UsbEpNum, XUsbPsu_Ep0Recv(), XUsbPsu_EpGetTransferIndex(), XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

s32 XUsbPsu_EpBufferSend ( struct XUsbPsu InstancePtr,
u8  UsbEp,
u8 *  BufferPtr,
u32  BufferLen 
)

Initiates DMA to send data on endpoint to Host.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpis USB endpoint number.
BufferPtris pointer to data.
BufferLenis length of data buffer.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_Ep::BufferPtr, XUsbPsu_Ep::BytesTxed, XUsbPsu::ConfigPtr, XUsbPsu_Ep::CurUf, XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_Ep::PhyEpNum, XUsbPsu_Ep::RequestedBytes, XUsbPsu_Ep::ResourceIndex, XUsbPsu_Ep::Type, XUsbPsu_Ep::UsbEpNum, XUsbPsu_Ep0Send(), XUsbPsu_EpGetTransferIndex(), XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

void XUsbPsu_EpClearStall ( struct XUsbPsu InstancePtr,
u8  Epnum,
u8  Dir 
)

Clears Stall on an Endpoint.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
EpNumis USB endpoint number.
Diris direction.
Returns
None.
Note
None.

References XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Ep::UsbEpNum, XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

Referenced by XUsbPsu_EpDisable().

s32 XUsbPsu_EpDisable ( struct XUsbPsu InstancePtr,
u8  UsbEpNum,
u8  Dir 
)

Disables Endpoint.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpNumis USB endpoint number.
Diris direction of endpoint
  • XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
Returns
XST_SUCCESS else XST_FAILURE.
Note
None.

References XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Ep::MaxSize, XUsbPsu_Ep::PhyEpNum, XUsbPsu_Ep::Type, XUsbPsu_Ep::UsbEpNum, XUsbPsu_EpClearStall(), XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

s32 XUsbPsu_EpEnable ( struct XUsbPsu InstancePtr,
u8  UsbEpNum,
u8  Dir,
u16  Maxsize,
u8  Type,
u8  Restore 
)

Enables Endpoint for sending/receiving data.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpNumis USB endpoint number.
Diris direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
Maxsizeis size of Endpoint size.
Typeis Endpoint type Control/Bulk/Interrupt/Isoc.
Restoreshould be true if saved state should be restored; typically this would be false
Returns
XST_SUCCESS else XST_FAILURE.
Note
None.

References XUsbPsu::ConfigPtr, XUsbPsu_Ep::CurUf, XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Config::IsCacheCoherent, XUsbPsu::IsHibernated, XUsbPsu_Ep::MaxSize, XUsbPsu_Ep::PhyEpNum, XUsbPsu_Ep::Type, XUsbPsu_Ep::UsbEpNum, XUsbPsu_ReadReg, XUsbPsu_SetEpConfig(), XUsbPsu_SetXferResource(), XUsbPsu_StartEpConfig(), and XUsbPsu_WriteReg.

Referenced by XUsbPsu_EnableControlEp().

u32 XUsbPsu_EpGetTransferIndex ( struct XUsbPsu InstancePtr,
u8  UsbEpNum,
u8  Dir 
)

Returns Transfer Index assigned by Core for an Endpoint transfer.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpNumis USB endpoint number.
Diris direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT
Returns
Transfer Resource Index.
Note
None.

References XUsbPsu_ReadReg.

Referenced by XUsbPsu_Ep0Recv(), XUsbPsu_Ep0Send(), XUsbPsu_Ep0StartStatus(), XUsbPsu_EpBufferRecv(), XUsbPsu_EpBufferSend(), XUsbPsu_Idle(), and XUsbPsu_RecvSetup().

void XUsbPsu_EpInterrupt ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Epevt Event 
)

Endpoint interrupt handler.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis endpoint Event occurred in the core.
Returns
None.
Note
None.

References XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Ep0Intr(), XUsbPsu_EpXferComplete(), and XUsbPsu_EpXferNotReady().

Referenced by XUsbPsu_EventHandler().

void XUsbPsu_EpSetStall ( struct XUsbPsu InstancePtr,
u8  Epnum,
u8  Dir 
)

Stalls an Endpoint.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Epnumis USB endpoint number.
Diris direction.
Returns
None.
Note
None.

References XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Ep::UsbEpNum, XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

Referenced by XUsbPsu_Ep0StallRestart().

void XUsbPsu_EpXferComplete ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Epevt Event 
)

Checks the Data Phase and calls user Endpoint handler.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis a pointer to the Endpoint event occurred in core.
Returns
None.
Note
None.

References XUsbPsu_Ep::BufferPtr, XUsbPsu_Ep::BytesTxed, XUsbPsu::ConfigPtr, XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_Ep::MaxSize, XUsbPsu_Ep::RequestedBytes, and XUsbPsu_Ep::ResourceIndex.

Referenced by XUsbPsu_EpInterrupt().

void XUsbPsu_EpXferNotReady ( struct XUsbPsu InstancePtr,
const struct XUsbPsu_Event_Epevt Event 
)

For Isochronous transfer, get the microframe time and calls respective Endpoint handler.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis a pointer to the Endpoint event occurred in core.
Returns
None.
Note
None.

References XUsbPsu_Ep::CurUf, XUsbPsu::eps, XUsbPsu_Ep::Interval, and XUsbPsu_Ep::Type.

Referenced by XUsbPsu_EpInterrupt().

void XUsbPsu_EventBufferHandler ( struct XUsbPsu InstancePtr)

Processes events in an Event Buffer.

Parameters
InstancePtris a pointer to the XUsbPsu instance. Event buffer number.
Returns
None.
Note
None.

References XUsbPsu::ConfigPtr, XUsbPsu_Config::IsCacheCoherent, XUsbPsu::IsHibernated, XUsbPsu_EventHandler(), XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

Referenced by XUsbPsu_IntrHandler().

void XUsbPsu_EventBuffersReset ( struct XUsbPsu InstancePtr)

Resets Event buffer Registers to zero so that events are not written by Core.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
Returns
None

References XUsbPsu_WriteReg.

Referenced by XUsbPsu_Idle().

void XUsbPsu_EventBuffersSetup ( struct XUsbPsu InstancePtr)

Sets up Event buffers so that events are written by Core.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
Returns
None

References XUsbPsu_WriteReg.

Referenced by XUsbPsu_CfgInitialize().

void XUsbPsu_EventHandler ( struct XUsbPsu InstancePtr,
const union XUsbPsu_Event Event 
)

Processes an Event entry in Event Buffer.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eventis the Event entry.
Returns
None.
Note
None.

References XUsbPsu_DevInterrupt(), and XUsbPsu_EpInterrupt().

Referenced by XUsbPsu_EventBufferHandler().

struct XUsbPsu_EpParams * XUsbPsu_GetEpParams ( struct XUsbPsu InstancePtr)
u8 XUsbPsu_GetLinkState ( struct XUsbPsu InstancePtr)

Gets current State of USB Link.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
Link State
Note
None.

References XUsbPsu_ReadReg.

void XUsbPsu_Idle ( struct XUsbPsu InstancePtr)

This function puts the controller into idle state by stopping the transfers for all endpoints, stopping the usb core and clearing the event buffers.

buffers.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
Returns
None

References XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Ep::MaxSize, XUsbPsu_Ep::PhyEpNum, XUsbPsu_Ep::ResourceIndex, XUsbPsu_Ep::Type, XUsbPsu_EpGetTransferIndex(), XUsbPsu_EventBuffersReset(), XUsbPsu_GetEpParams(), XUsbPsu_ReadHwParams(), XUsbPsu_ReadReg, XUsbPsu_SendEpCmd(), XUsbPsu_Stop(), XUsbPsu_Wait_Clear_Timeout(), and XUsbPsu_WriteReg.

void XUsbPsu_InitializeEps ( struct XUsbPsu InstancePtr)

Initializes Endpoints.

All OUT endpoints are even numbered and all IN endpoints are odd numbered. EP0 is for Control OUT and EP1 is for Control IN.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
None.
Note
None.

References XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::PhyEpNum, and XUsbPsu_Ep::ResourceIndex.

Referenced by XUsbPsu_CfgInitialize().

void XUsbPsu_IntrHandler ( void *  XUsbPsuInstancePtr)

Main Interrupt Handler.

Returns
None.
Note
None.

References XUsbPsu_EventBufferHandler(), XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

Referenced by SetupInterruptSystem(), and UsbPollHandler().

s32 XUsbPsu_IsEpStalled ( struct XUsbPsu InstancePtr,
u8  Epnum,
u8  Dir 
)

Returns status of endpoint - Stalled or not.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
EpNumis USB endpoint number.
Diris direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
Returns
1 - if stalled 0 - if not stalled
Note
None.

References XUsbPsu::eps, XUsbPsu_Ep::EpStatus, and XUsbPsu_Ep::PhyEpNum.

s32 XUsbPsu_IsSuperSpeed ( struct XUsbPsu InstancePtr)

Checks if the current speed is Super Speed or not.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

Referenced by IsSuperSpeed().

void XUsbPsu_LinkStsChangeIntr ( struct XUsbPsu InstancePtr,
u32  EvtInfo 
)

Link Status Change Interrupt handler.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
EvtInfois Event information.
Returns
None.
Note
None.

Referenced by XUsbPsu_DevInterrupt().

XUsbPsu_Config * XUsbPsu_LookupConfig ( u16  DeviceId)

Lookup the device configuration based on the unique device ID.

The table contains the configuration info for each device in the system.

Parameters
DeviceIdis the unique device ID of the device being looked up.
Returns
A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.
void XUsbPsu_PhyReset ( struct XUsbPsu InstancePtr)

Issues core PHY reset.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
Returns
None

References XUsbPsu_ReadReg, XUsbPsu_WriteReg, and XUsbSleep().

Referenced by XUsbPsu_CoreInit().

u32 XUsbPsu_ReadHwParams ( struct XUsbPsu InstancePtr,
u8  RegIndex 
)

Reads data from Hardware Params Registers of Core.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
RegIndexis Register number to read
  • XUSBPSU_GHWPARAMS0
  • XUSBPSU_GHWPARAMS1
  • XUSBPSU_GHWPARAMS2
  • XUSBPSU_GHWPARAMS3
  • XUSBPSU_GHWPARAMS4
  • XUSBPSU_GHWPARAMS5
  • XUSBPSU_GHWPARAMS6
  • XUSBPSU_GHWPARAMS7
Returns
One of the GHWPARAMS RegValister contents.

References XUsbPsu_ReadReg.

Referenced by XUsbPsu_CfgInitialize(), XUsbPsu_CoreInit(), and XUsbPsu_Idle().

s32 XUsbPsu_RecvSetup ( struct XUsbPsu InstancePtr)

Initiates DMA on Control Endpoint 0 to receive Setup packet.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
XST_SUCCESS else XST_FAILURE.
Note
None.

References XUsbPsu::ConfigPtr, XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Config::IsCacheCoherent, XUsbPsu_Ep::ResourceIndex, XUsbPsu_Ep::UsbEpNum, XUSBPSU_EP0_SETUP_PHASE, XUsbPsu_EpGetTransferIndex(), XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

Referenced by XUsbPsu_ConnDoneIntr(), XUsbPsu_Ep0StallRestart(), and XUsbPsu_Ep0StatusDone().

void XUsbPsu_ResetIntr ( struct XUsbPsu InstancePtr)

Reset Interrupt handler.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
None.
Note
None.

References XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

Referenced by XUsbPsu_DevInterrupt().

void XUsbPsu_SaveEndpointState ( struct XUsbPsu InstancePtr,
struct XUsbPsu_Ep Ept 
)

Query endpoint state and save it in EpSavedState.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Eptis a pointer to the XUsbPsu pointer structure.
Returns
None.
Note
None.

References XUsbPsu_Ep::Direction, XUsbPsu_Ep::EpSavedState, XUsbPsu_Ep::PhyEpNum, XUsbPsu_Ep::UsbEpNum, XUsbPsu_GetEpParams(), XUsbPsu_ReadReg, and XUsbPsu_SendEpCmd().

s32 XUsbPsu_SendEpCmd ( struct XUsbPsu InstancePtr,
u8  UsbEpNum,
u8  Dir,
u32  Cmd,
struct XUsbPsu_EpParams *  Params 
)

Sends Endpoint command to Endpoint.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpNumis USB endpoint number.
Diris direction of endpoint
  • XUSBPSU_EP_DIR_IN/ XUSBPSU_EP_DIR_OUT.
Cmdis Endpoint command.
Paramsis Endpoint command parameters.
Returns
XST_SUCCESS else XST_FAILURE.
Note
None.

References XUsbPsu_Wait_Clear_Timeout(), and XUsbPsu_WriteReg.

Referenced by XUsbPsu_ClearStalls(), XUsbPsu_Ep0_EndControlData(), XUsbPsu_Ep0Recv(), XUsbPsu_Ep0Send(), XUsbPsu_Ep0StartStatus(), XUsbPsu_EpBufferRecv(), XUsbPsu_EpBufferSend(), XUsbPsu_EpClearStall(), XUsbPsu_EpSetStall(), XUsbPsu_Idle(), XUsbPsu_RecvSetup(), XUsbPsu_SaveEndpointState(), XUsbPsu_SetEpConfig(), XUsbPsu_SetXferResource(), XUsbPsu_StartEpConfig(), and XUsbPsu_StopTransfer().

s32 XUsbPsu_SetDeviceAddress ( struct XUsbPsu InstancePtr,
u16  Addr 
)

Sets Device Address of the Core.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Addris address to set.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

Referenced by XUsbPsu_CfgInitialize().

s32 XUsbPsu_SetEpConfig ( struct XUsbPsu InstancePtr,
u8  UsbEpNum,
u8  Dir,
u16  Size,
u8  Type,
u8  Restore 
)

Sends Set Endpoint Configuration command to Endpoint.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpNumis USB endpoint number.
Diris direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
Sizeis size of Endpoint size.
Typeis Endpoint type Control/Bulk/Interrupt/Isoc.
Restoreshould be true if saved state should be restored; typically this would be false
Returns
XST_SUCCESS else XST_FAILURE.
Note
None.

References XUsbPsu::eps, XUsbPsu_Ep::EpSavedState, XUsbPsu_Ep::Interval, XUsbPsu_Ep::Type, XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

Referenced by XUsbPsu_EpEnable().

void XUsbPsu_SetEpHandler ( struct XUsbPsu InstancePtr,
u8  Epnum,
u8  Dir,
void(*)(void *, u32, u32)  Handler 
)

Sets an user handler to be called after data is sent/received by an Endpoint.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
EpNumis USB endpoint number.
Diris direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
Handleris user handler to be called.
Returns
None.
Note
None.

References XUsbPsu::eps, and XUsbPsu_Ep::PhyEpNum.

s32 XUsbPsu_SetLinkState ( struct XUsbPsu InstancePtr,
XusbPsuLinkStateChange  State 
)

Sets USB Link to a particular State.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Stateis State of Link to set.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, XUsbPsu_Wait_Clear_Timeout(), and XUsbPsu_WriteReg.

void XUsbPsu_SetMode ( struct XUsbPsu InstancePtr,
u32  Mode 
)

Sets mode of Core to USB Device/Host/OTG.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
Modeis mode to set
  • XUSBPSU_GCTL_PRTCAP_OTG
  • XUSBPSU_GCTL_PRTCAP_HOST
  • XUSBPSU_GCTL_PRTCAP_DEVICE
Returns
None

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

Referenced by XUsbPsu_CfgInitialize().

void XUsbPsu_SetSpeed ( struct XUsbPsu InstancePtr,
u32  Speed 
)

Sets speed of the Core for connecting to Host.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Speedis required speed
  • XUSBPSU_DCFG_HIGHSPEED
  • XUSBPSU_DCFG_FULLSPEED2
  • XUSBPSU_DCFG_LOWSPEED
  • XUSBPSU_DCFG_FULLSPEED1
Returns
None
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

Referenced by XUsbPsu_CfgInitialize().

s32 XUsbPsu_SetTestMode ( struct XUsbPsu InstancePtr,
u32  Mode 
)

Enables USB2 Test Modes.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Modeis Test mode to set.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

Referenced by XUsbPsu_Ep0StatusDone().

s32 XUsbPsu_SetU1SleepTimeout ( struct XUsbPsu InstancePtr,
u8  Sleep 
)

Set U1 sleep timeout.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Sleepis time in microseconds
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

s32 XUsbPsu_SetU2SleepTimeout ( struct XUsbPsu InstancePtr,
u8  Sleep 
)

Set U2 sleep timeout.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Sleepis time in microseconds
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

s32 XUsbPsu_SetXferResource ( struct XUsbPsu InstancePtr,
u8  UsbEpNum,
u8  Dir 
)

Sends Set Transfer Resource command to Endpoint.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpNumis USB endpoint number.
Diris direction of endpoint -XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
Returns
XST_SUCCESS else XST_FAILURE.
Note
None.

References XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

Referenced by XUsbPsu_EpEnable().

s32 XUsbPsu_Start ( struct XUsbPsu InstancePtr)

Starts the controller so that Host can detect this device.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, XUsbPsu_Wait_Clear_Timeout(), and XUsbPsu_WriteReg.

s32 XUsbPsu_StartEpConfig ( struct XUsbPsu InstancePtr,
u32  UsbEpNum,
u8  Dir 
)

Sends Start New Configuration command to Endpoint.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpNumis USB endpoint number.
Diris direction of endpoint
  • XUSBPSU_EP_DIR_IN/ XUSBPSU_EP_DIR_OUT.
Returns
XST_SUCCESS else XST_FAILURE.
Note
As per data book this command should be issued by software under these conditions:
  1. After power-on-reset with XferRscIdx=0 before starting to configure Physical Endpoints 0 and 1.
  2. With XferRscIdx=2 before starting to configure Physical Endpoints > 1
  3. This command should always be issued to Endpoint 0 (DEPCMD0).

References XUsbPsu_GetEpParams(), and XUsbPsu_SendEpCmd().

Referenced by XUsbPsu_EpEnable().

s32 XUsbPsu_Stop ( struct XUsbPsu InstancePtr)

Stops the controller so that Device disconnects from Host.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, XUsbPsu_Wait_Set_Timeout(), and XUsbPsu_WriteReg.

Referenced by XUsbPsu_Idle().

void XUsbPsu_StopTransfer ( struct XUsbPsu InstancePtr,
u8  UsbEpNum,
u8  Dir,
u8  Force 
)

Stops transfer on Endpoint.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
UsbEpNumis USB endpoint number.
Diris direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT. Force flag to stop/pause transfer.
Returns
None.
Note
None.

References XUsbPsu_Ep::Direction, XUsbPsu::eps, XUsbPsu_Ep::EpStatus, XUsbPsu_Ep::ResourceIndex, XUsbPsu_Ep::UsbEpNum, XUsbPsu_GetEpParams(), XUsbPsu_SendEpCmd(), and XUsbSleep().

s32 XUsbPsu_U1SleepDisable ( struct XUsbPsu InstancePtr)

Enable U1 disable sleep.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

s32 XUsbPsu_U1SleepEnable ( struct XUsbPsu InstancePtr)

Enable U1 enable sleep.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

s32 XUsbPsu_U2SleepDisable ( struct XUsbPsu InstancePtr)

Enable U2 disable sleep.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

s32 XUsbPsu_U2SleepEnable ( struct XUsbPsu InstancePtr)

Enable U2 enable sleep.

Parameters
InstancePtris a pointer to the XUsbPsu instance.
Returns
XST_SUCCESS else XST_FAILURE
Note
None.

References XUsbPsu_ReadReg, and XUsbPsu_WriteReg.

s32 XUsbPsu_Wait_Clear_Timeout ( struct XUsbPsu InstancePtr,
u32  Offset,
u32  BitMask,
u32  Timeout 
)

Waits until a bit in a register is cleared or timeout occurs.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
Offsetis register offset.
BitMaskis bit mask of required bit to be checked.
Timeoutis the time to wait specified in micro seconds.
Returns
  • XST_SUCCESS when bit is cleared.
  • XST_FAILURE when timed out.

References XUsbPsu_ReadReg, and XUsbSleep().

Referenced by XUsbPsu_CoreInit(), XUsbPsu_Idle(), XUsbPsu_SendEpCmd(), XUsbPsu_SetLinkState(), and XUsbPsu_Start().

s32 XUsbPsu_Wait_Set_Timeout ( struct XUsbPsu InstancePtr,
u32  Offset,
u32  BitMask,
u32  Timeout 
)

Waits until a bit in a register is set or timeout occurs.

Parameters
InstancePtris a pointer to the XUsbPsu instance to be worked on.
Offsetis register offset.
BitMaskis bit mask of required bit to be checked.
Timeoutis the time to wait specified in micro seconds.
Returns
  • XST_SUCCESS when bit is set.
  • XST_FAILURE when timed out.

References XUsbPsu_ReadReg, and XUsbSleep().

Referenced by XUsbPsu_Stop().

void XUsbSleep ( u32  USeconds)

API for Sleep routine.

Parameters
USecondsis time in MicroSeconds.
Returns
None.
Note
None.

Referenced by XUsbPsu_Ep0_EndControlData(), XUsbPsu_PhyReset(), XUsbPsu_StopTransfer(), XUsbPsu_Wait_Clear_Timeout(), and XUsbPsu_Wait_Set_Timeout().