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dp12rxss
Xilinx SDK Drivers API Documentation
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Data Structures | |
struct | XDpRxSs_Dp159Data |
DP159 data structure. More... | |
Macros | |
#define | XDPRXSS_DP159_IIC_SLAVE 0x5E |
DP159 slave device address. More... | |
#define | XDPRXSS_DP159_RBR 0x06 |
1.62 Gbps link rate More... | |
#define | XDPRXSS_DP159_HBR 0x0A |
2.70 Gbps link rate More... | |
#define | XDPRXSS_DP159_HBR2 0x14 |
5.40 Gbps link rate More... | |
#define | XDPRXSS_DP159_LANE_COUNT_1 1 |
Lane count of 1. More... | |
#define | XDPRXSS_DP159_LANE_COUNT_2 2 |
Lane count of 2. More... | |
#define | XDPRXSS_DP159_LANE_COUNT_4 4 |
Lane count of 4. More... | |
#define | XDPRXSS_DP159_CPI_PD_RBR 0x1F |
CPI pull down RBR. More... | |
#define | XDPRXSS_DP159_CPI_PD_HBR 0x27 |
CPI pull down HBR. More... | |
#define | XDPRXSS_DP159_CPI_PD_HBR2 0x5F |
CPI pull down HBR2. More... | |
#define | XDPRXSS_DP159_PLL_CTRL_PD_RBR 0x30 |
PLL control pull down RBR. More... | |
#define | XDPRXSS_DP159_PLL_CTRL_PD_HBR 0x30 |
PLL control pull down HBR. More... | |
#define | XDPRXSS_DP159_PLL_CTRL_PD_HBR2 0x30 |
PLL control pull down HBR2. More... | |
#define | XDPRXSS_DP159_EQ_LEV 8 |
Equivalisation level. More... | |
#define | XDPRXSS_DP159_LOCK_WAIT 512 |
Lock wait value. More... | |
#define | XDPRXSS_HW_H_ |
Prevent circular inclusions by using protection macros. More... | |
#define | XDPRXSS_LINK_BW_SET_162GBPS XDP_RX_OVER_LINK_BW_SET_162GBPS |
1.62 Gbps link rate. More... | |
#define | XDPRXSS_LINK_BW_SET_270GBPS XDP_RX_OVER_LINK_BW_SET_270GBPS |
2.70 Gbps link rate. More... | |
#define | XDPRXSS_LINK_BW_SET_540GBPS XDP_RX_OVER_LINK_BW_SET_540GBPS |
5.40 Gbps link rate. More... | |
#define | XDPRXSS_LANE_COUNT_SET_1 XDP_RX_OVER_LANE_COUNT_SET_1 |
Lane count of 1. More... | |
#define | XDPRXSS_LANE_COUNT_SET_2 XDP_RX_OVER_LANE_COUNT_SET_2 |
Lane count of 2. More... | |
#define | XDPRXSS_LANE_COUNT_SET_4 XDP_RX_OVER_LANE_COUNT_SET_4 |
Lane count of 4. More... | |
#define | XDPRXSS_RX_PHY_CONFIG XDP_RX_PHY_CONFIG |
PHY reset and config. More... | |
#define | XDPRXSS_PHY_POWER_DOWN XDP_RX_PHY_POWER_DOWN |
PHY power down. More... | |
#define | XDPRXSS_MSA_HRES XDP_RX_MSA_HRES |
Number of active pixels per line (the horizontal resolution). More... | |
#define | XDPRXSS_MSA_VRES XDP_RX_MSA_VHEIGHT |
Number of active lines (the vertical resolution). More... | |
#define | XDPRXSS_NUM_STREAMS 4 |
Maximum number of streams supported. More... | |
#define | XDPRXSS_MAX_NPORTS XDP_MAX_NPORTS |
Maximum number of RX ports. More... | |
#define | XDPRXSS_GUID_NBYTES XDP_GUID_NBYTES |
Number of bytes for GUID. More... | |
#define | XDPRXSS_TMRCTR_RST_VAL 100000000 |
Timer Counter reset value. More... | |
Enumerations | |
enum | XDpRxSs_Dp159ConfigType { XDPRXSS_DP159_CT_TP1 = 1, XDPRXSS_DP159_CT_TP2, XDPRXSS_DP159_CT_TP3, XDPRXSS_DP159_CT_UNPLUG } |
This typedef enumerates the types of configuration types applied to DP159 to configure. More... | |
Functions | |
void | XDpRxSs_ReportCoreInfo (XDpRxSs *InstancePtr) |
This function reports list of sub-cores included in DisplayPort RX Subsystem. More... | |
void | XDpRxSs_ReportLinkInfo (XDpRxSs *InstancePtr) |
This function prints the link status, selected resolution, link rate /lane count symbol error. More... | |
void | XDpRxSs_ReportMsaInfo (XDpRxSs *InstancePtr) |
This function prints the current main stream attributes from the DisplayPort RX core. More... | |
void | XDpRxSs_ReportDp159BitErrCount (XDpRxSs *InstancePtr) |
This function prints the bit error encountered in DP159. More... | |
void | XDpRxSs_ReportHdcpInfo (XDpRxSs *InstancePtr) |
This function prints the debug display info of the HDCP interface. More... | |
u32 | XDpRxSs_SelfTest (XDpRxSs *InstancePtr) |
This function performs self test on DisplayPort Receiver Subsystem sub-cores. More... | |
XDpRxSs_Config * | XDpRxSs_LookupConfig (u16 DeviceId) |
This function returns a reference to an XDpRxSs_Config structure based on the core id, DeviceId. More... | |
Register access macro definition | |
#define | XDpRxSs_In32 Xil_In32 |
Input Operations. More... | |
#define | XDpRxSs_Out32 Xil_Out32 |
Output Operations. More... | |
#define | XDpRxSs_ReadReg(BaseAddress, RegOffset) XDpRxSs_In32((BaseAddress) + ((u32)RegOffset)) |
This macro reads a value from a DisplayPort Receiver Subsystem register. More... | |
#define | XDpRxSs_WriteReg(BaseAddress, RegOffset, Data) XDpRxSs_Out32((BaseAddress) + ((u32)RegOffset), (u32)(Data)) |
This macro writes a value to a DisplayPort Receiver Subsystem register. More... | |
#define XDPRXSS_DP159_CPI_PD_HBR 0x27 |
#include <xdprxss_dp159.h>
CPI pull down HBR.
#define XDPRXSS_DP159_CPI_PD_HBR2 0x5F |
#include <xdprxss_dp159.h>
CPI pull down HBR2.
#define XDPRXSS_DP159_CPI_PD_RBR 0x1F |
#include <xdprxss_dp159.h>
CPI pull down RBR.
#define XDPRXSS_DP159_EQ_LEV 8 |
#include <xdprxss_dp159.h>
Equivalisation level.
#define XDPRXSS_DP159_HBR 0x0A |
#include <xdprxss_dp159.h>
2.70 Gbps link rate
#define XDPRXSS_DP159_HBR2 0x14 |
#include <xdprxss_dp159.h>
5.40 Gbps link rate
#define XDPRXSS_DP159_IIC_SLAVE 0x5E |
#include <xdprxss_dp159.h>
DP159 slave device address.
#define XDPRXSS_DP159_LANE_COUNT_1 1 |
#include <xdprxss_dp159.h>
Lane count of 1.
#define XDPRXSS_DP159_LANE_COUNT_2 2 |
#include <xdprxss_dp159.h>
Lane count of 2.
#define XDPRXSS_DP159_LANE_COUNT_4 4 |
#include <xdprxss_dp159.h>
Lane count of 4.
#define XDPRXSS_DP159_LOCK_WAIT 512 |
#include <xdprxss_dp159.h>
Lock wait value.
#define XDPRXSS_DP159_PLL_CTRL_PD_HBR 0x30 |
#include <xdprxss_dp159.h>
PLL control pull down HBR.
#define XDPRXSS_DP159_PLL_CTRL_PD_HBR2 0x30 |
#include <xdprxss_dp159.h>
PLL control pull down HBR2.
#define XDPRXSS_DP159_PLL_CTRL_PD_RBR 0x30 |
#include <xdprxss_dp159.h>
PLL control pull down RBR.
#define XDPRXSS_DP159_RBR 0x06 |
#include <xdprxss_dp159.h>
1.62 Gbps link rate
#define XDPRXSS_GUID_NBYTES XDP_GUID_NBYTES |
#include <xdprxss_hw.h>
Number of bytes for GUID.
#define XDPRXSS_HW_H_ |
#include <xdprxss_hw.h>
Prevent circular inclusions by using protection macros.
#define XDpRxSs_In32 Xil_In32 |
#include <xdprxss_hw.h>
Input Operations.
#define XDPRXSS_LANE_COUNT_SET_1 XDP_RX_OVER_LANE_COUNT_SET_1 |
#include <xdprxss_hw.h>
Lane count of 1.
Referenced by XDpRxSs_HandleDownReq(), and XDpRxSs_SetLaneCount().
#define XDPRXSS_LANE_COUNT_SET_2 XDP_RX_OVER_LANE_COUNT_SET_2 |
#include <xdprxss_hw.h>
Lane count of 2.
Referenced by XDpRxSs_HandleDownReq(), and XDpRxSs_SetLaneCount().
#define XDPRXSS_LANE_COUNT_SET_4 XDP_RX_OVER_LANE_COUNT_SET_4 |
#include <xdprxss_hw.h>
Lane count of 4.
Referenced by XDpRxSs_HandleDownReq(), and XDpRxSs_SetLaneCount().
#define XDPRXSS_LINK_BW_SET_162GBPS XDP_RX_OVER_LINK_BW_SET_162GBPS |
#define XDPRXSS_LINK_BW_SET_270GBPS XDP_RX_OVER_LINK_BW_SET_270GBPS |
#define XDPRXSS_LINK_BW_SET_540GBPS XDP_RX_OVER_LINK_BW_SET_540GBPS |
#define XDPRXSS_MAX_NPORTS XDP_MAX_NPORTS |
#include <xdprxss_hw.h>
Maximum number of RX ports.
#define XDPRXSS_MSA_HRES XDP_RX_MSA_HRES |
#include <xdprxss_hw.h>
Number of active pixels per line (the horizontal resolution).
Referenced by DpRxSs_DetectResolution().
#define XDPRXSS_MSA_VRES XDP_RX_MSA_VHEIGHT |
#include <xdprxss_hw.h>
Number of active lines (the vertical resolution).
Referenced by DpRxSs_DetectResolution().
#define XDPRXSS_NUM_STREAMS 4 |
#include <xdprxss_hw.h>
Maximum number of streams supported.
#define XDpRxSs_Out32 Xil_Out32 |
#include <xdprxss_hw.h>
Output Operations.
#define XDPRXSS_PHY_POWER_DOWN XDP_RX_PHY_POWER_DOWN |
#include <xdprxss_hw.h>
PHY power down.
#define XDpRxSs_ReadReg | ( | BaseAddress, | |
RegOffset | |||
) | XDpRxSs_In32((BaseAddress) + ((u32)RegOffset)) |
#include <xdprxss_hw.h>
This macro reads a value from a DisplayPort Receiver Subsystem register.
A 32 bit read is performed. If the component is implemented in a smaller width, only the least significant data is read from the register. The most significant data will be read as 0.
BaseAddress | is the base address of the XDpRxSs core instance. |
RegOffset | is the register offset of the register (defined at the top of this file). |
Referenced by DpRxSs_DetectResolution(), and XDpRxSs_ReportLinkInfo().
#define XDPRXSS_RX_PHY_CONFIG XDP_RX_PHY_CONFIG |
#include <xdprxss_hw.h>
PHY reset and config.
#define XDPRXSS_TMRCTR_RST_VAL 100000000 |
#define XDpRxSs_WriteReg | ( | BaseAddress, | |
RegOffset, | |||
Data | |||
) | XDpRxSs_Out32((BaseAddress) + ((u32)RegOffset), (u32)(Data)) |
#include <xdprxss_hw.h>
This macro writes a value to a DisplayPort Receiver Subsystem register.
A 32 bit write is performed. If the component is implemented in a smaller width, only the least significant data is written.
BaseAddress | is the base address of the XDpRxSs core instance. |
RegOffset | is the register offset of the register (defined at the top of this file) to be written. |
Data | is the 32-bit value to write into the register. |
Referenced by XDpRxSs_Reset().
#include <xdprxss_dp159.h>
This typedef enumerates the types of configuration types applied to DP159 to configure.
Enumerator | |
---|---|
XDPRXSS_DP159_CT_TP1 | DP159 training pattern 1. |
XDPRXSS_DP159_CT_TP2 | DP159 training pattern 2. |
XDPRXSS_DP159_CT_TP3 | DP159 training pattern 1. |
XDPRXSS_DP159_CT_UNPLUG | DP159 unplug. |
XDpRxSs_Config* XDpRxSs_LookupConfig | ( | u16 | DeviceId | ) |
#include <xdprxss_sinit.c>
This function returns a reference to an XDpRxSs_Config structure based on the core id, DeviceId.
The return value will refer to an entry in the device configuration table defined in the xdprxss_g.c file.
DeviceId | is the unique core ID of the XDpRxSs core for the lookup operation. |
Referenced by DpRxSs_DebugExample(), DpRxSs_HdcpExample(), DpRxSs_IntrExample(), DpRxSs_MstExample(), and DpRxSs_SelfTestExample().
void XDpRxSs_ReportCoreInfo | ( | XDpRxSs * | InstancePtr | ) |
#include <xdprxss_dbg.c>
This function reports list of sub-cores included in DisplayPort RX Subsystem.
InstancePtr | is a pointer to the XDpRxSs core instance. |
References XDpRxSs_Config::ColorFormat, XDpRxSs::Config, XDpRxSs::DpPtr, XDpRxSs_Config::HdcpEnable, XDpRxSs::IicPtr, XDpRxSs_Config::MaxBpc, XDpRxSs_Config::MaxLaneCount, XDpRxSs_Config::MaxNumAudioCh, XDpRxSs_UsrOpt::MstSupport, XDpRxSs_Config::MstSupport, XDpRxSs_Config::NumMstStreams, XDpRxSs_UsrOpt::NumOfStreams, XDpRxSs_Config::SecondaryChEn, and XDpRxSs::UsrOpt.
void XDpRxSs_ReportDp159BitErrCount | ( | XDpRxSs * | InstancePtr | ) |
#include <xdprxss_dbg.c>
This function prints the bit error encountered in DP159.
InstancePtr | is a pointer to the XDpRxSs core instance. |
References XDpRxSs::IicPtr.
void XDpRxSs_ReportHdcpInfo | ( | XDpRxSs * | InstancePtr | ) |
#include <xdprxss_dbg.c>
This function prints the debug display info of the HDCP interface.
InstancePtr | is a pointer to the XDpRxSs core instance. |
void XDpRxSs_ReportLinkInfo | ( | XDpRxSs * | InstancePtr | ) |
#include <xdprxss_dbg.c>
This function prints the link status, selected resolution, link rate /lane count symbol error.
InstancePtr | is a pointer to the XDpRxSs core instance. |
References XDpRxSs::DpPtr, and XDpRxSs_ReadReg.
void XDpRxSs_ReportMsaInfo | ( | XDpRxSs * | InstancePtr | ) |
#include <xdprxss_dbg.c>
This function prints the current main stream attributes from the DisplayPort RX core.
InstancePtr | is a pointer to the XDpRxSs core instance. |
References XDpRxSs::DpPtr.
u32 XDpRxSs_SelfTest | ( | XDpRxSs * | InstancePtr | ) |
#include <xdprxss_selftest.c>
This function performs self test on DisplayPort Receiver Subsystem sub-cores.
InstancePtr | is a pointer to the XDpRxSs core instance. |
References XDpRxSs::Config, XDpRxSs::DpPtr, XDpRxSs_Config::HdcpEnable, and XDpRxSs::IicPtr.
Referenced by DpRxSs_SelfTestExample().