csi2tx
Xilinx SDK Drivers API Documentation
Csi2tx_v1_0

Data Structures

struct  XCsi2Tx_SPktData
 This typedef contains the Short Packet information from the Generic Short Packet Register. More...
 
struct  XCsi2Tx_Config
 The configuration structure for CSI Controller. More...
 
struct  XCsi2Tx
 The XCsi2Tx driver instance data. More...
 

Macros

#define XCSI2TX_H_
 Prevent circular inclusions by using protection macros. More...
 
#define XCSI2TX_ENABLE   1
 Flag denoting enabling of CSI. More...
 
#define XCSI2TX_DISABLE   0
 Flag denoting disabling of CSI. More...
 
#define XCSI2TX_MAX_LANES   4
 Max Lanes supported by CSI. More...
 
#define XCSI2TX_MAX_VC   4
 Max number of Virtual Channels. More...
 
#define XCSI2TX_HW_H_
 Prevent circular inclusions by using protection macros. More...
 
#define XCSI2TX_GSP_MASK   0x00000001F
 Number of GSPs can be safely written to GSP FIFO, before it goes full. More...
 

Typedefs

typedef void(* XCsi2Tx_CallBack) (void *CallBackRef, u32 Mask)
 Callback type for all interrupts defined. More...
 

Enumerations

enum  XCsi2Tx_LCStatus { XCSI2TX_LC_LESS_LINES = 1, XCSI2TX_LC_MORE_LINES }
 This typedef defines the different errors codes for Line Count status for a Virtual Channel when Frame End Generation is enabled. More...
 

Functions

u32 XCsi2Tx_CfgInitialize (XCsi2Tx *InstancePtr, XCsi2Tx_Config *CfgPtr, UINTPTR EffectiveAddr)
 Initialize the XCsi2Tx instance provided by the caller based on the given Config structure. More...
 
u32 XCsi2Tx_Reset (XCsi2Tx *InstancePtr)
 This function will do a reset of the IP. More...
 
u32 XCsi2Tx_Activate (XCsi2Tx *InstancePtr, u8 Flag)
 Thsi function will enable/disable the IP Core to start processing. More...
 
u32 XCsi2Tx_Configure (XCsi2Tx *InstancePtr)
 This function will configure the core with proper number of Active Lanes. More...
 
void XCsi2Tx_GetShortPacket (XCsi2Tx *InstancePtr, XCsi2Tx_SPktData *ShortPacketStruct)
 This function will get the short packet received in the FIFO from the Generic Short Packet Register and fill up the structure passed from caller. More...
 
u8 XCsi2Tx_IsActiveLaneCountValid (XCsi2Tx *InstancePtr, u8 ActiveLanesCount)
 This function checks the validity of the active lanes parameter. More...
 
u32 XCsi2Tx_SetLineCountForVC (XCsi2Tx *InstancePtr, u8 VC, u16 LineCount)
 This function sets the Line Count for virtual Channel if Frame End Generation feature is enabled. More...
 
u32 XCsi2Tx_GetLineCountForVC (XCsi2Tx *InstancePtr, u8 VC, u16 *LineCount)
 This function gets the Line Count for virtual Channel if Frame End Generation feature is enabled. More...
 
XCsi2Tx_ConfigXCsi2Tx_LookupConfig (u32 DeviceId)
 Look up the hardware configuration for a device instance. More...
 
u32 XCsi2Tx_SelfTest (XCsi2Tx *InstancePtr)
 Runs a self-test on the driver/device. More...
 
void XCsi2Tx_IntrHandler (void *InstancePtr)
 This function is the interrupt handler for the CSI2 Tx core. More...
 
int XCsi2Tx_SetCallBack (XCsi2Tx *InstancePtr, u32 HandleType, void *Callbackfunc, void *Callbackref)
 This routine installs an asynchronous callback function for the given HandlerType: More...
 
u32 XCsi2Tx_GetIntrEnable (XCsi2Tx *InstancePtr)
 This function will get the interrupt mask set (enabled) in the CSI2 Tx core. More...
 
void XCsi2Tx_IntrEnable (XCsi2Tx *InstancePtr, u32 Mask)
 This function will enable the interrupts present in the interrupt mask passed onto the function. More...
 
void XCsi2Tx_IntrDisable (XCsi2Tx *InstancePtr, u32 Mask)
 This function will disable the interrupts present in the interrupt mask passed onto the function. More...
 
u32 XCsi2Tx_GetIntrStatus (XCsi2Tx *InstancePtr)
 This function will get the list of interrupts pending in the Interrupt Status Register of the CSI2 Tx core. More...
 
void XCsi2Tx_InterruptClear (XCsi2Tx *InstancePtr, u32 Mask)
 This function will clear the interrupts set in the Interrupt Status Register of the CSI2 Tx core. More...
 
u32 Csi2TxSelfTestExample (u32 DeviceId)
 This function checks if the Max Lane count from the generated file matches the value present in the protocol configuration register. More...
 
int main ()
 The entry point for this example. More...
 

Interrupt Types for setting Callbacks

#define XCSI2TX_HANDLER_WRG_LANE   1
 
#define XCSI2TX_HANDLER_GSPFIFO_FULL   2
 
#define XCSI2TX_HANDLER_ULPS   3
 
#define XCSI2TX_HANDLER_LINEBUF_FULL   4
 
#define XCSI2TX_HANDLER_WRG_DATATYPE   5
 
#define XCSI2TX_HANDLER_UNDERRUN_PIXEL   6
 
#define XCSI2TX_HANDLER_LCERRVC0   7
 
#define XCSI2TX_HANDLER_LCERRVC1   8
 
#define XCSI2TX_HANDLER_LCERRVC2   9
 
#define XCSI2TX_HANDLER_LCERRVC3   10
 

Device registers

Register sets of MIPI CSI2 Tx Core

#define XCSI2TX_CCR_OFFSET   0x00000000
 Core Configuration Register. More...
 
#define XCSI2TX_PCR_OFFSET
 
#define XCSI2TX_GIER_OFFSET   0x00000020
 Global Interrupt Register. More...
 
#define XCSI2TX_ISR_OFFSET   0x00000024
 Interrupt Status Register. More...
 
#define XCSI2TX_IER_OFFSET   0x00000028
 Interrupt Enable Register. More...
 
#define XCSI2TX_SPKTR_OFFSET   0x00000030
 Generic Short Packet Entry. More...
 
#define XCSI2TX_LINE_COUNT_VC0   0x00000040
 Line Count for VC0. More...
 
#define XCSI2TX_LINE_COUNT_VC1   0x00000044
 Line Count for VC1. More...
 
#define XCSI2TX_LINE_COUNT_VC2   0x00000048
 Line Count for VC2. More...
 
#define XCSI2TX_LINE_COUNT_VC3   0x0000004C
 Line Count for VC3. More...
 
#define XCSI2TX_GSP_OFFSET   0x00000078 /* < GSP Status*/
 

Bitmasks and offsets of XCSI_GIER_OFFSET register

This register contains the global interrupt enable bit.

#define XCSI2TX_GIER_GIE_MASK   0x00000001
 Global Interrupt Enable bit. More...
 
#define XCSI2TX_GIER_GIE_SHIFT   0
 Shift bits for Global Interrupt Enable. More...
 
#define XCSI2TX_GIER_SET   1
 Enable the Global Interrupts. More...
 
#define XCSI2TX_GIER_RESET   0
 Disable the Global Interrupts. More...
 

Bitmasks and offsets of XCSI_CCR_OFFSET register

This register is used for the enabling/disabling and resetting the core of CSI2 Tx Controller

#define XCSI2TX_CCR_COREENB_MASK   0x00000001 /* Enable/Disable core */
 
#define XCSI2TX_CCR_SOFTRESET_MASK   0x00000002 /* Soft Reset the core */
 
#define XCSI2TX_CSR_RIPCD_MASK   0x00000004 /* Core ready */
 
#define XCSI2TX_CCR_ULPS_MASK   0x00000008 /* ULPS */
 
#define XCSI2TX_CCR_CLKMODE_MASK   0x00000010 /* Clock Mode */
 
#define XCSI2TX_CCR_COREENB_SHIFT   0 /* Shift bit for Core Enable*/
 
#define XCSI2TX_CCR_SOFTRESET_SHIFT   1 /* Shift bit for Soft reset */
 
#define XCSI2TX_CSR_RIPCD_SHIFT   2 /* Bit Shift for Core Ready */
 
#define XCSI2TX_CCR_ULPS_SHIFT   3 /* Shift bits for ulps */
 
#define XCSI2TX_CCR_CLKMODE_SHIFT   4 /* Shift bits for clock mode */
 

Bitmasks and offset of XCSI2TX_PCR_OFFSET register

This register reports the number of lanes configured during core generation and number of lanes actively used.

#define XCSI2TX_PCR_LINEGEN_MASK   0x00008000 /* Line generation Mode */
 
#define XCSI2TX_PCR_PIXEL_MASK   0x00006000 /* Pixel Mode */
 
#define XCSI2TX_PCR_MAXLANES_MASK   0x00000018 /* Maximum lanes in core */
 
#define XCSI2TX_PCR_ACTLANES_MASK   0x00000003 /* Active lanes in core */
 
#define XCSI2TX_PCR_LINEGEN_SHIFT   15 /* Line generation */
 
#define XCSI2TX_PCR_PIXEL_SHIFT   13 /* Pixel Mode */
 
#define XCSI2TX_PCR_MAXLANES_SHIFT   3 /* Max Lanes */
 
#define XCSI2TX_PCR_ACTLANES_SHIFT   0 /* Active Lanes */
 

BitMasks interrupts

#define XCSI2TX_IER_ALLINTR_MASK   0x0000003F /* All interrupts mask */
 
#define XCSI2TX_ISR_ALLINTR_MASK   0x0000003F /* All interrupts mask */
 
#define XCSI2TX_UNDERRUN_PIXEL_MASK   (1<<0) /* Underrun Pixel */
 
#define XCSI2TX_WRONG_DATATYPE_MASK   (1<<1) /* Wrong data type */
 
#define XCSI2TX_LINE_BUFF_FULL_MASK   (1<<2) /* Line buffer full */
 
#define XCSI2TX_DPHY_ULPS_MASK   (1<<3) /* Dphy ulps */
 
#define XCSI_GPSFIFO_MASK   (1<<4) /* GPS fifo full */
 
#define XCSI_INCORT_LANE_MASK   (1<<5) /* Wrong lane configuration */
 
#define XCSITX_LCSTAT_VC0_IER_MASK   (1<<8)
 Line Count Status for VC0 IER. More...
 
#define XCSITX_LCSTAT_VC1_IER_MASK   (1<<10)
 Line Count Status for VC1 IER. More...
 
#define XCSITX_LCSTAT_VC2_IER_MASK   (1<<12)
 Line Count Status for VC2 IER. More...
 
#define XCSITX_LCSTAT_VC3_IER_MASK   (1<<14)
 Line Count Status for VC3 IER. More...
 
#define XCSITX_LCSTAT_VC0_IER_OFFSET   (8)
 Line Count Status for VC0 IER Offset. More...
 
#define XCSITX_LCSTAT_VC1_IER_OFFSET   (10)
 Line Count Status for VC1 IER Offset. More...
 
#define XCSITX_LCSTAT_VC2_IER_OFFSET   (12)
 Line Count Status for VC2 IER Offset. More...
 
#define XCSITX_LCSTAT_VC3_IER_OFFSET   (14)
 Line Count Status for VC3 IER Offset. More...
 
#define XCSITX_LCSTAT_VC0_ISR_MASK   (0x3<<8)
 Line Count Status for VC0 ISR. More...
 
#define XCSITX_LCSTAT_VC1_ISR_MASK   (0x3<<10)
 Line Count Status for VC1 ISR. More...
 
#define XCSITX_LCSTAT_VC2_ISR_MASK   (0x3<<12)
 Line Count Status for VC2 ISR. More...
 
#define XCSITX_LCSTAT_VC3_ISR_MASK   (0x3<<14)
 Line Count Status for VC3 ISR. More...
 
#define XCSITX_LCSTAT_VC0_ISR_OFFSET   (8)
 Line Count Status for VC0 ISR Offset. More...
 
#define XCSITX_LCSTAT_VC1_ISR_OFFSET   (10)
 Line Count Status for VC1 ISR Offset. More...
 
#define XCSITX_LCSTAT_VC2_ISR_OFFSET   (12)
 Line Count Status for VC2 ISR Offset. More...
 
#define XCSITX_LCSTAT_VC3_ISR_OFFSET   (14)
 Line Count Status for VC3 ISR Offset. More...
 

BitMasks Short Packets

#define XCSI2TX_SPKTR_DATA_MASK   0x00FFFF00 /* Short Packet byte0 and 1*/
 
#define XCSI2TX_SPKTR_DATA_SHIFT   8
 
#define XCSI2TX_SPKTR_VC_MASK
 
#define XCSI2TX_SPKTR_VC_SHIFT   6
 
#define XCSI2TX_SPKTR_DT_MASK   0x0000003F /* Short Packet Data type*/
 
#define XCSI2TX_SPKTR_DT_SHIFT   0
 

Macro Definition Documentation

◆ XCSI2TX_CCR_OFFSET

#define XCSI2TX_CCR_OFFSET   0x00000000

#include <xcsi2tx_hw.h>

Core Configuration Register.

◆ XCSI2TX_DISABLE

#define XCSI2TX_DISABLE   0

#include <xcsi2tx.h>

Flag denoting disabling of CSI.

Referenced by XCsi2Tx_Activate().

◆ XCSI2TX_ENABLE

#define XCSI2TX_ENABLE   1

#include <xcsi2tx.h>

Flag denoting enabling of CSI.

◆ XCSI2TX_GIER_GIE_MASK

#define XCSI2TX_GIER_GIE_MASK   0x00000001

#include <xcsi2tx_hw.h>

Global Interrupt Enable bit.

◆ XCSI2TX_GIER_GIE_SHIFT

#define XCSI2TX_GIER_GIE_SHIFT   0

#include <xcsi2tx_hw.h>

Shift bits for Global Interrupt Enable.

◆ XCSI2TX_GIER_OFFSET

#define XCSI2TX_GIER_OFFSET   0x00000020

#include <xcsi2tx_hw.h>

Global Interrupt Register.

◆ XCSI2TX_GIER_RESET

#define XCSI2TX_GIER_RESET   0

#include <xcsi2tx_hw.h>

Disable the Global Interrupts.

◆ XCSI2TX_GIER_SET

#define XCSI2TX_GIER_SET   1

#include <xcsi2tx_hw.h>

Enable the Global Interrupts.

◆ XCSI2TX_GSP_MASK

#define XCSI2TX_GSP_MASK   0x00000001F

#include <xcsi2tx_hw.h>

Number of GSPs can be safely written to GSP FIFO, before it goes full.

◆ XCSI2TX_H_

#define XCSI2TX_H_

#include <xcsi2tx.h>

Prevent circular inclusions by using protection macros.

◆ XCSI2TX_HW_H_

#define XCSI2TX_HW_H_

#include <xcsi2tx_hw.h>

Prevent circular inclusions by using protection macros.

◆ XCSI2TX_IER_OFFSET

#define XCSI2TX_IER_OFFSET   0x00000028

#include <xcsi2tx_hw.h>

Interrupt Enable Register.

◆ XCSI2TX_ISR_OFFSET

#define XCSI2TX_ISR_OFFSET   0x00000024

#include <xcsi2tx_hw.h>

Interrupt Status Register.

◆ XCSI2TX_LINE_COUNT_VC0

#define XCSI2TX_LINE_COUNT_VC0   0x00000040

#include <xcsi2tx_hw.h>

Line Count for VC0.

◆ XCSI2TX_LINE_COUNT_VC1

#define XCSI2TX_LINE_COUNT_VC1   0x00000044

#include <xcsi2tx_hw.h>

Line Count for VC1.

◆ XCSI2TX_LINE_COUNT_VC2

#define XCSI2TX_LINE_COUNT_VC2   0x00000048

#include <xcsi2tx_hw.h>

Line Count for VC2.

◆ XCSI2TX_LINE_COUNT_VC3

#define XCSI2TX_LINE_COUNT_VC3   0x0000004C

#include <xcsi2tx_hw.h>

Line Count for VC3.

◆ XCSI2TX_MAX_LANES

#define XCSI2TX_MAX_LANES   4

#include <xcsi2tx.h>

Max Lanes supported by CSI.

◆ XCSI2TX_MAX_VC

#define XCSI2TX_MAX_VC   4

#include <xcsi2tx.h>

Max number of Virtual Channels.

Referenced by XCsi2Tx_GetLineCountForVC(), and XCsi2Tx_SetLineCountForVC().

◆ XCSI2TX_SPKTR_OFFSET

#define XCSI2TX_SPKTR_OFFSET   0x00000030

#include <xcsi2tx_hw.h>

Generic Short Packet Entry.

◆ XCSITX_LCSTAT_VC0_IER_MASK

#define XCSITX_LCSTAT_VC0_IER_MASK   (1<<8)

#include <xcsi2tx_hw.h>

Line Count Status for VC0 IER.

◆ XCSITX_LCSTAT_VC0_IER_OFFSET

#define XCSITX_LCSTAT_VC0_IER_OFFSET   (8)

#include <xcsi2tx_hw.h>

Line Count Status for VC0 IER Offset.

◆ XCSITX_LCSTAT_VC0_ISR_MASK

#define XCSITX_LCSTAT_VC0_ISR_MASK   (0x3<<8)

#include <xcsi2tx_hw.h>

Line Count Status for VC0 ISR.

Referenced by XCsi2Tx_IntrHandler().

◆ XCSITX_LCSTAT_VC0_ISR_OFFSET

#define XCSITX_LCSTAT_VC0_ISR_OFFSET   (8)

#include <xcsi2tx_hw.h>

Line Count Status for VC0 ISR Offset.

Referenced by XCsi2Tx_IntrHandler().

◆ XCSITX_LCSTAT_VC1_IER_MASK

#define XCSITX_LCSTAT_VC1_IER_MASK   (1<<10)

#include <xcsi2tx_hw.h>

Line Count Status for VC1 IER.

◆ XCSITX_LCSTAT_VC1_IER_OFFSET

#define XCSITX_LCSTAT_VC1_IER_OFFSET   (10)

#include <xcsi2tx_hw.h>

Line Count Status for VC1 IER Offset.

◆ XCSITX_LCSTAT_VC1_ISR_MASK

#define XCSITX_LCSTAT_VC1_ISR_MASK   (0x3<<10)

#include <xcsi2tx_hw.h>

Line Count Status for VC1 ISR.

Referenced by XCsi2Tx_IntrHandler().

◆ XCSITX_LCSTAT_VC1_ISR_OFFSET

#define XCSITX_LCSTAT_VC1_ISR_OFFSET   (10)

#include <xcsi2tx_hw.h>

Line Count Status for VC1 ISR Offset.

Referenced by XCsi2Tx_IntrHandler().

◆ XCSITX_LCSTAT_VC2_IER_MASK

#define XCSITX_LCSTAT_VC2_IER_MASK   (1<<12)

#include <xcsi2tx_hw.h>

Line Count Status for VC2 IER.

◆ XCSITX_LCSTAT_VC2_IER_OFFSET

#define XCSITX_LCSTAT_VC2_IER_OFFSET   (12)

#include <xcsi2tx_hw.h>

Line Count Status for VC2 IER Offset.

◆ XCSITX_LCSTAT_VC2_ISR_MASK

#define XCSITX_LCSTAT_VC2_ISR_MASK   (0x3<<12)

#include <xcsi2tx_hw.h>

Line Count Status for VC2 ISR.

Referenced by XCsi2Tx_IntrHandler().

◆ XCSITX_LCSTAT_VC2_ISR_OFFSET

#define XCSITX_LCSTAT_VC2_ISR_OFFSET   (12)

#include <xcsi2tx_hw.h>

Line Count Status for VC2 ISR Offset.

Referenced by XCsi2Tx_IntrHandler().

◆ XCSITX_LCSTAT_VC3_IER_MASK

#define XCSITX_LCSTAT_VC3_IER_MASK   (1<<14)

#include <xcsi2tx_hw.h>

Line Count Status for VC3 IER.

◆ XCSITX_LCSTAT_VC3_IER_OFFSET

#define XCSITX_LCSTAT_VC3_IER_OFFSET   (14)

#include <xcsi2tx_hw.h>

Line Count Status for VC3 IER Offset.

◆ XCSITX_LCSTAT_VC3_ISR_MASK

#define XCSITX_LCSTAT_VC3_ISR_MASK   (0x3<<14)

#include <xcsi2tx_hw.h>

Line Count Status for VC3 ISR.

Referenced by XCsi2Tx_IntrHandler().

◆ XCSITX_LCSTAT_VC3_ISR_OFFSET

#define XCSITX_LCSTAT_VC3_ISR_OFFSET   (14)

#include <xcsi2tx_hw.h>

Line Count Status for VC3 ISR Offset.

Referenced by XCsi2Tx_IntrHandler().

Typedef Documentation

◆ XCsi2Tx_CallBack

typedef void(* XCsi2Tx_CallBack) (void *CallBackRef, u32 Mask)

#include <xcsi2tx.h>

Callback type for all interrupts defined.

Parameters
CallBackRefis a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
Maskis a bit mask indicating the cause of the event. For current core version, this parameter is "OR" of 0 or more XCSI2TX_ISR_*_MASK constants defined in xcsi_hw.h.
Returns
None
Note
None

Enumeration Type Documentation

◆ XCsi2Tx_LCStatus

#include <xcsi2tx.h>

This typedef defines the different errors codes for Line Count status for a Virtual Channel when Frame End Generation is enabled.

Enumerator
XCSI2TX_LC_LESS_LINES 

Less no of lines recvd.

XCSI2TX_LC_MORE_LINES 

More no of lines recvd.

Function Documentation

◆ Csi2TxSelfTestExample()

u32 Csi2TxSelfTestExample ( u32  DeviceId)

#include <xcsi2tx_example_selftest.c>

This function checks if the Max Lane count from the generated file matches the value present in the protocol configuration register.

Parameters
DeviceIdis the CSI2Tx Controller Device id.
Returns
  • XST_SUCCESS if Lane Count match
  • XST_FAILURE if Lane Count don't match.
Note
None.

References XCsi2Tx_Config::BaseAddr, XCsi2Tx_CfgInitialize(), XCsi2Tx_LookupConfig(), and XCsi2Tx_SelfTest().

Referenced by main().

◆ main()

int main ( )

#include <xcsi2tx_example_selftest.c>

The entry point for this example.

It invokes the example function, and reports the execution status.

Parameters
None.
Returns
  • XST_SUCCESS if example finishes successfully
  • XST_FAILURE if example fails.
Note
None.

References Csi2TxSelfTestExample().

◆ XCsi2Tx_Activate()

u32 XCsi2Tx_Activate ( XCsi2Tx InstancePtr,
u8  Flag 
)

#include <xcsi2tx.c>

Thsi function will enable/disable the IP Core to start processing.

Parameters
InstancePtris the XCsi2Tx instance to operate on.
Flagwill be used to indicate Enable or Disable action
Returns
  • XST_SUCCESS on successful core enable or disable
  • XST_FAILURE if core disable times out.
Note
None.

References XCsi2Tx::IsReady, and XCSI2TX_DISABLE.

◆ XCsi2Tx_CfgInitialize()

u32 XCsi2Tx_CfgInitialize ( XCsi2Tx InstancePtr,
XCsi2Tx_Config CfgPtr,
UINTPTR  EffectiveAddr 
)

#include <xcsi2tx.c>

Initialize the XCsi2Tx instance provided by the caller based on the given Config structure.

Parameters
InstancePtris the XCsi2Tx instance to operate on.
CfgPtris the device configuration structure containing information about a specific CSI.
EffectiveAddris the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used.
Returns
  • XST_SUCCESS Initialization was successful.
Note
None.

References XCsi2Tx_Config::BaseAddr, XCsi2Tx::Config, and XCsi2Tx::IncorrectLaneCallBack.

Referenced by Csi2TxSelfTestExample().

◆ XCsi2Tx_Configure()

u32 XCsi2Tx_Configure ( XCsi2Tx InstancePtr)

#include <xcsi2tx.c>

This function will configure the core with proper number of Active Lanes.

Parameters
InstancePtris the XCsi2Tx instance to operate on.
Returns
  • XST_SUCCESS On configuring the core.
  • XST_FAILURE if active lanes not set correctly
Note
None.

References XCsi2Tx::ActiveLanes, XCsi2Tx::IsReady, XCsi2Tx_GetIntrEnable(), and XCsi2Tx_IsActiveLaneCountValid().

◆ XCsi2Tx_GetIntrEnable()

u32 XCsi2Tx_GetIntrEnable ( XCsi2Tx InstancePtr)

#include <xcsi2tx.h>

This function will get the interrupt mask set (enabled) in the CSI2 Tx core.

Parameters
InstancePtris the XCsi instance to operate on
Returns
Interrupt Mask with bits set for corresponding interrupt in Interrupt enable register
Note
None

Referenced by XCsi2Tx_Configure().

◆ XCsi2Tx_GetIntrStatus()

u32 XCsi2Tx_GetIntrStatus ( XCsi2Tx InstancePtr)

#include <xcsi2tx.h>

This function will get the list of interrupts pending in the Interrupt Status Register of the CSI2 Tx core.

Parameters
InstancePtris the XCsi instance to operate on
Returns
Interrupt Mask with bits set for corresponding interrupt in Interrupt Status register
Note
None

Referenced by XCsi2Tx_IntrHandler().

◆ XCsi2Tx_GetLineCountForVC()

u32 XCsi2Tx_GetLineCountForVC ( XCsi2Tx InstancePtr,
u8  VC,
u16 *  LineCount 
)

#include <xcsi2tx.c>

This function gets the Line Count for virtual Channel if Frame End Generation feature is enabled.

Parameters
InstancePtris a pointer to the Subsystem instance to be worked on.
VCis which Virtual channel to be configured for (0-3).
LineCountis pointer to variable to be filled with line count for the Virtual channel
Returns
  • XST_NO_FEATURE if Frame End generation is not enabled
  • XST_INVALID_PARAM if any param is invalid e.g. VC is always 0 to 3 and Line Count is 0 to 0xFFFF.
  • XST_SUCCESS otherwise
Note
None.

References XCsi2Tx::Config, XCsi2Tx_Config::FEGenEnabled, and XCSI2TX_MAX_VC.

◆ XCsi2Tx_GetShortPacket()

void XCsi2Tx_GetShortPacket ( XCsi2Tx InstancePtr,
XCsi2Tx_SPktData ShortPacketStruct 
)

#include <xcsi2tx.c>

This function will get the short packet received in the FIFO from the Generic Short Packet Register and fill up the structure passed from caller.

Parameters
InstancePtris the XCsi2Tx instance to operate on
ShortPacketStructis going to be filled up by this function and returned to the caller.
Returns
None

◆ XCsi2Tx_InterruptClear()

void XCsi2Tx_InterruptClear ( XCsi2Tx InstancePtr,
u32  Mask 
)

#include <xcsi2tx.h>

This function will clear the interrupts set in the Interrupt Status Register of the CSI2 Tx core.

Parameters
InstancePtris the XCsi instance to operate on
Maskis Interrupt Mask with bits set for corresponding interrupt to be cleared in the Interrupt Status register
Returns
None
Note
None

◆ XCsi2Tx_IntrDisable()

void XCsi2Tx_IntrDisable ( XCsi2Tx InstancePtr,
u32  Mask 
)

#include <xcsi2tx.h>

This function will disable the interrupts present in the interrupt mask passed onto the function.

Parameters
InstancePtris the XCsi instance to operate on
Maskis the interrupt mask which need to be enabled in core
Returns
None
Note
None

◆ XCsi2Tx_IntrEnable()

void XCsi2Tx_IntrEnable ( XCsi2Tx InstancePtr,
u32  Mask 
)

#include <xcsi2tx.h>

This function will enable the interrupts present in the interrupt mask passed onto the function.

Parameters
InstancePtris the XCsi instance to operate on
Maskis the interrupt mask which need to be enabled in core
Returns
None
Note
None

◆ XCsi2Tx_IntrHandler()

void XCsi2Tx_IntrHandler ( void *  InstancePtr)

#include <xcsi2tx.h>

This function is the interrupt handler for the CSI2 Tx core.

This handler reads the pending interrupt from the Interrupt Status register, determines the source of the interrupts and calls the respective callbacks for the interrupts that are enabled in Interrupt Enable register, and finally clears the interrupts.

The application is responsible for connecting this function to the interrupt system. Application beyond this core is also responsible for providing callbacks to handle interrupts and installing the callbacks using XCsi2Tx_SetCallBack() during initialization phase.

Parameters
InstancePtris a pointer to the XCsi2Tx core instance.
Returns
None.
Note
Interrupt should be enabled to execute interrupt handler.

References XCsi2Tx::Config, XCsi2Tx_Config::FEGenEnabled, XCsi2Tx::IsReady, XCsi2Tx::LCErrVC0Ref, XCsi2Tx::LCErrVC1Ref, XCsi2Tx::LCErrVC2Ref, XCsi2Tx::LCErrVC3Ref, XCsi2Tx_GetIntrStatus(), XCSI2TX_LC_LESS_LINES, XCSI2TX_LC_MORE_LINES, XCSITX_LCSTAT_VC0_ISR_MASK, XCSITX_LCSTAT_VC0_ISR_OFFSET, XCSITX_LCSTAT_VC1_ISR_MASK, XCSITX_LCSTAT_VC1_ISR_OFFSET, XCSITX_LCSTAT_VC2_ISR_MASK, XCSITX_LCSTAT_VC2_ISR_OFFSET, XCSITX_LCSTAT_VC3_ISR_MASK, and XCSITX_LCSTAT_VC3_ISR_OFFSET.

◆ XCsi2Tx_IsActiveLaneCountValid()

u8 XCsi2Tx_IsActiveLaneCountValid ( XCsi2Tx InstancePtr,
u8  ActiveLanesCount 
)

#include <xcsi2tx.c>

This function checks the validity of the active lanes parameter.

Parameters
InstancePtris a pointer to the Subsystem instance to be worked on.
ActiveLanesCountis the lane count to check if valid.
Returns
  • 1 if specified Active Lanes is valid.
  • 0 otherwise, if the Active Lanes specified isn't valid as per spec and design.
Note
None.

References XCsi2Tx::Config, and XCsi2Tx_Config::MaxLanesPresent.

Referenced by XCsi2Tx_Configure().

◆ XCsi2Tx_LookupConfig()

XCsi2Tx_Config * XCsi2Tx_LookupConfig ( u32  DeviceId)

#include <xcsi2tx.h>

Look up the hardware configuration for a device instance.

Parameters
DeviceIdis the unique device ID of the device to lookup for
Returns
The reference to the configuration record in the configuration table (in xcsi2tx_g.c) corresponding to the Device ID or if not found,a NULL pointer is returned.
Note
None

Referenced by Csi2TxSelfTestExample().

◆ XCsi2Tx_Reset()

u32 XCsi2Tx_Reset ( XCsi2Tx InstancePtr)

#include <xcsi2tx.c>

This function will do a reset of the IP.

This will reset the values of all regiters except Core Config and Protocol Config registers.

Parameters
InstancePtris the XCsi2Tx instance to operate on.
Returns
  • XST_SUCCESS On proper reset.
  • XST_FAILURE on timeout and core being stuck in reset
Note
None.

Referenced by XCsi2Tx_SelfTest().

◆ XCsi2Tx_SelfTest()

u32 XCsi2Tx_SelfTest ( XCsi2Tx InstancePtr)

#include <xcsi2tx.h>

Runs a self-test on the driver/device.

This test checks if the LaneCount present in register matches the one from the generated file.

Parameters
InstancePtris a pointer to the XCsi instance.
Returns
  • XST_SUCCESS if self-test was successful
  • XST_FAILURE if the read value was not equal to _g.c file
Note
None

References XCsi2Tx::IsReady, and XCsi2Tx_Reset().

Referenced by Csi2TxSelfTestExample().

◆ XCsi2Tx_SetCallBack()

int XCsi2Tx_SetCallBack ( XCsi2Tx InstancePtr,
u32  HandleType,
void *  Callbackfunc,
void *  Callbackref 
)

#include <xcsi2tx.h>

This routine installs an asynchronous callback function for the given HandlerType:

HandlerType                             Callback Function Type
----------------------------  --------------------------------------------
(XCSI2TX_HANDLER_WRG_LANE)              IncorrectLaneCallBack
(XCSI2TX_HANDLER_GSPFIFO_FULL)  GSPFIFOCallBack
(XCSI2TX_HANDLER_ULPS)          DPhyUlpsCallBack
(XCSI2TX_HANDLER_LINEBUF_FULL)  LineBufferCallBack
(XCSI2TX_HANDLER_WRG_DATATYPE)  WrgDataTypeCallBack
(XCSI2TX_HANDLER_UNDERRUN_PIXEL)        UnderrunPixelCallBack
(XCSI2TX_HANDLER_LCERRVC0)              LineCountErrVC0
(XCSI2TX_HANDLER_LCERRVC1)              LineCountErrVC1
(XCSI2TX_HANDLER_LCERRVC2)              LineCountErrVC2
(XCSI2TX_HANDLER_LCERRVC3)              LineCountErrVC3
Parameters
InstancePtris the XCsi2Tx instance to operate on
HandleTypeis the type of call back to be registered.
Callbackfuncis the pointer to a call back funtion which is called when a particular event occurs.
Callbackrefis a void pointer to data to be referenced to by the Callbackfunc
Returns
  • XST_SUCCESS when handler is installed.
  • XST_INVALID_PARAM when HandlerType is invalid.
Note
Invoking this function for a handler that already has been installed replaces it with the new handler.

References XCsi2Tx::IsReady.

◆ XCsi2Tx_SetLineCountForVC()

u32 XCsi2Tx_SetLineCountForVC ( XCsi2Tx InstancePtr,
u8  VC,
u16  LineCount 
)

#include <xcsi2tx.c>

This function sets the Line Count for virtual Channel if Frame End Generation feature is enabled.

This is to be called before starting the core.

Parameters
InstancePtris a pointer to the Subsystem instance to be worked on.
VCis which Virtual channel to be configured for (0-3).
LineCountis valid line count for the Virtual channel.
Returns
  • XST_NO_FEATURE if Frame End generation is not enabled
  • XST_INVALID_PARAM if any param is invalid e.g. VC is always 0 to 3 and Line Count is 0 to 0xFFFF.
  • XST_FAILURE in case the core is already running.
  • XST_SUCCESS otherwise
Note
None.

References XCsi2Tx::Config, XCsi2Tx_Config::FEGenEnabled, and XCSI2TX_MAX_VC.