canps
Xilinx SDK Drivers API Documentation
Canps_v3_2

Data Structures

struct  XCanPs_Config
 This typedef contains configuration information for a device. More...
 
struct  XCanPs
 The XCanPs driver instance data. More...
 

Macros

#define XCanPs_IsTxDone(InstancePtr)
 This macro checks if the transmission is complete. More...
 
#define XCanPs_IsTxFifoFull(InstancePtr)
 This macro checks if the transmission FIFO is full. More...
 
#define XCanPs_IsHighPriorityBufFull(InstancePtr)
 This macro checks if the Transmission High Priority Buffer is full. More...
 
#define XCanPs_IsRxEmpty(InstancePtr)
 This macro checks if the receive FIFO is empty. More...
 
#define XCanPs_IsAcceptFilterBusy(InstancePtr)
 This macro checks if the CAN device is ready for the driver to change Acceptance Filter Identifier Registers (AFIR) and Acceptance Filter Mask Registers (AFMR). More...
 
#define XCanPs_CreateIdValue(StandardId, SubRemoteTransReq, IdExtension, ExtendedId, RemoteTransReq)
 This macro calculates CAN message identifier value given identifier field values. More...
 
#define XCanPs_CreateDlcValue(DataLengCode)   (((DataLengCode) << XCANPS_DLCR_DLC_SHIFT) & XCANPS_DLCR_DLC_MASK)
 This macro calculates value for Data Length Code register given Data Length Code value. More...
 
#define XCanPs_ClearTimestamp(InstancePtr)
 This macro clears the timestamp in the Timestamp Control Register. More...
 
#define XCanPs_ReadReg(BaseAddr, RegOffset)   Xil_In32((BaseAddr) + (u32)(RegOffset))
 This macro reads the given register. More...
 
#define XCanPs_WriteReg(BaseAddr, RegOffset, Data)   Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data))
 This macro writes the given register. More...
 

Typedefs

typedef void(* XCanPs_SendRecvHandler) (void *CallBackRef)
 Callback type for frame sending and reception interrupts. More...
 
typedef void(* XCanPs_ErrorHandler) (void *CallBackRef, u32 ErrorMask)
 Callback type for error interrupt. More...
 
typedef void(* XCanPs_EventHandler) (void *CallBackRef, u32 Mask)
 Callback type for all kinds of interrupts except sending frame interrupt, receiving frame interrupt, and error interrupt. More...
 

Functions

void XCanPs_Reset (XCanPs *InstancePtr)
 This function resets the CAN device. More...
 
u8 XCanPs_GetMode (XCanPs *InstancePtr)
 This routine returns the current operation mode of the CAN device. More...
 
void XCanPs_EnterMode (XCanPs *InstancePtr, u8 OperationMode)
 This function allows the CAN device to enter one of the following operation modes: More...
 
u32 XCanPs_GetStatus (XCanPs *InstancePtr)
 This function returns Status value from Status Register (SR). More...
 
void XCanPs_GetBusErrorCounter (XCanPs *InstancePtr, u8 *RxErrorCount, u8 *TxErrorCount)
 This function reads Receive and Transmit error counters. More...
 
u32 XCanPs_GetBusErrorStatus (XCanPs *InstancePtr)
 This function reads Error Status value from Error Status Register (ESR). More...
 
void XCanPs_ClearBusErrorStatus (XCanPs *InstancePtr, u32 Mask)
 This function clears Error Status bit(s) previously set in Error Status Register (ESR). More...
 
s32 XCanPs_Send (XCanPs *InstancePtr, u32 *FramePtr)
 This function sends a CAN Frame. More...
 
s32 XCanPs_Recv (XCanPs *InstancePtr, u32 *FramePtr)
 This function receives a CAN Frame. More...
 
s32 XCanPs_SendHighPriority (XCanPs *InstancePtr, u32 *FramePtr)
 This routine sends a CAN High Priority frame. More...
 
void XCanPs_AcceptFilterEnable (XCanPs *InstancePtr, u32 FilterIndexes)
 This routine enables individual acceptance filters. More...
 
void XCanPs_AcceptFilterDisable (XCanPs *InstancePtr, u32 FilterIndexes)
 This routine disables individual acceptance filters. More...
 
u32 XCanPs_AcceptFilterGetEnabled (XCanPs *InstancePtr)
 This function returns enabled acceptance filters. More...
 
s32 XCanPs_AcceptFilterSet (XCanPs *InstancePtr, u32 FilterIndex, u32 MaskValue, u32 IdValue)
 This function sets values to the Acceptance Filter Mask Register (AFMR) and Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter. More...
 
void XCanPs_AcceptFilterGet (XCanPs *InstancePtr, u32 FilterIndex, u32 *MaskValue, u32 *IdValue)
 This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter. More...
 
s32 XCanPs_SetBaudRatePrescaler (XCanPs *InstancePtr, u8 Prescaler)
 This routine sets Baud Rate Prescaler value. More...
 
u8 XCanPs_GetBaudRatePrescaler (XCanPs *InstancePtr)
 This routine gets Baud Rate Prescaler value. More...
 
s32 XCanPs_SetBitTiming (XCanPs *InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u8 TimeSegment1)
 This routine sets Bit time. More...
 
void XCanPs_GetBitTiming (XCanPs *InstancePtr, u8 *SyncJumpWidth, u8 *TimeSegment2, u8 *TimeSegment1)
 This routine gets Bit time. More...
 
s32 XCanPs_SetRxIntrWatermark (XCanPs *InstancePtr, u8 Threshold)
 This routine sets the Rx Full threshold in the Watermark Interrupt Register. More...
 
u8 XCanPs_GetRxIntrWatermark (XCanPs *InstancePtr)
 This routine gets the Rx Full threshold from the Watermark Interrupt Register. More...
 
s32 XCanPs_SetTxIntrWatermark (XCanPs *InstancePtr, u8 Threshold)
 This routine sets the Tx Empty Threshold in the Watermark Interrupt Register. More...
 
u8 XCanPs_GetTxIntrWatermark (XCanPs *InstancePtr)
 This routine gets the Tx Empty threshold from Watermark Interrupt Register. More...
 
s32 XCanPs_SelfTest (XCanPs *InstancePtr)
 This function runs a self-test on the CAN driver/device. More...
 
void XCanPs_IntrEnable (XCanPs *InstancePtr, u32 Mask)
 This routine enables interrupt(s). More...
 
void XCanPs_IntrDisable (XCanPs *InstancePtr, u32 Mask)
 This routine disables interrupt(s). More...
 
u32 XCanPs_IntrGetEnabled (XCanPs *InstancePtr)
 This routine returns enabled interrupt(s). More...
 
u32 XCanPs_IntrGetStatus (XCanPs *InstancePtr)
 This routine returns interrupt status read from Interrupt Status Register. More...
 
void XCanPs_IntrClear (XCanPs *InstancePtr, u32 Mask)
 This function clears interrupt(s). More...
 
void XCanPs_IntrHandler (void *InstancePtr)
 This routine is the interrupt handler for the CAN driver. More...
 
s32 XCanPs_SetHandler (XCanPs *InstancePtr, u32 HandlerType, void *CallBackFunc, void *CallBackRef)
 This routine installs an asynchronous callback function for the given HandlerType: More...
 
XCanPs_ConfigXCanPs_LookupConfig (u16 DeviceId)
 This function looks for the device configuration based on the unique device ID. More...
 
void XCanPs_ResetHw (u32 BaseAddr)
 This function resets the CAN device. More...
 

Variables

XCanPs_Config XCanPs_ConfigTable [XPAR_XCANPS_NUM_INSTANCES]
 This table contains configuration information for each CAN device in the system. More...
 
XCanPs_Config XCanPs_ConfigTable [XPAR_XCANPS_NUM_INSTANCES]
 This table contains configuration information for each CAN device in the system. More...
 

CAN operation modes

#define XCANPS_MODE_CONFIG   0x00000001U
 Configuration mode. More...
 
#define XCANPS_MODE_NORMAL   0x00000002U
 Normal mode. More...
 
#define XCANPS_MODE_LOOPBACK   0x00000004U
 Loop Back mode. More...
 
#define XCANPS_MODE_SLEEP   0x00000008U
 Sleep mode. More...
 
#define XCANPS_MODE_SNOOP   0x00000010U
 Snoop mode. More...
 

Callback identifiers used as parameters to XCanPs_SetHandler()

#define XCANPS_HANDLER_SEND   1U
 Handler type for frame sending interrupt. More...
 
#define XCANPS_HANDLER_RECV   2U
 Handler type for frame reception interrupt. More...
 
#define XCANPS_HANDLER_ERROR   3U
 Handler type for error interrupt. More...
 
#define XCANPS_HANDLER_EVENT   4U
 Handler type for all other interrupts. More...
 

Register offsets for the CAN. Each register is 32 bits.

#define XCANPS_SRR_OFFSET   0x00000000U
 Software Reset Register. More...
 
#define XCANPS_MSR_OFFSET   0x00000004U
 Mode Select Register. More...
 
#define XCANPS_BRPR_OFFSET   0x00000008U
 Baud Rate Prescaler. More...
 
#define XCANPS_BTR_OFFSET   0x0000000CU
 Bit Timing Register. More...
 
#define XCANPS_ECR_OFFSET   0x00000010U
 Error Counter Register. More...
 
#define XCANPS_ESR_OFFSET   0x00000014U
 Error Status Register. More...
 
#define XCANPS_SR_OFFSET   0x00000018U
 Status Register. More...
 
#define XCANPS_ISR_OFFSET   0x0000001CU
 Interrupt Status Register. More...
 
#define XCANPS_IER_OFFSET   0x00000020U
 Interrupt Enable Register. More...
 
#define XCANPS_ICR_OFFSET   0x00000024U
 Interrupt Clear Register. More...
 
#define XCANPS_TCR_OFFSET   0x00000028U
 Timestamp Control Register. More...
 
#define XCANPS_WIR_OFFSET   0x0000002CU
 Watermark Interrupt Reg. More...
 
#define XCANPS_TXFIFO_ID_OFFSET   0x00000030U
 TX FIFO ID. More...
 
#define XCANPS_TXFIFO_DLC_OFFSET   0x00000034U
 TX FIFO DLC. More...
 
#define XCANPS_TXFIFO_DW1_OFFSET   0x00000038U
 TX FIFO Data Word 1. More...
 
#define XCANPS_TXFIFO_DW2_OFFSET   0x0000003CU
 TX FIFO Data Word 2. More...
 
#define XCANPS_TXHPB_ID_OFFSET   0x00000040U
 TX High Priority Buffer ID. More...
 
#define XCANPS_TXHPB_DLC_OFFSET   0x00000044U
 TX High Priority Buffer DLC. More...
 
#define XCANPS_TXHPB_DW1_OFFSET   0x00000048U
 TX High Priority Buf Data 1. More...
 
#define XCANPS_TXHPB_DW2_OFFSET   0x0000004CU
 TX High Priority Buf Data Word 2. More...
 
#define XCANPS_RXFIFO_ID_OFFSET   0x00000050U
 RX FIFO ID. More...
 
#define XCANPS_RXFIFO_DLC_OFFSET   0x00000054U
 RX FIFO DLC. More...
 
#define XCANPS_RXFIFO_DW1_OFFSET   0x00000058U
 RX FIFO Data Word 1. More...
 
#define XCANPS_RXFIFO_DW2_OFFSET   0x0000005CU
 RX FIFO Data Word 2. More...
 
#define XCANPS_AFR_OFFSET   0x00000060U
 Acceptance Filter Register. More...
 
#define XCANPS_AFMR1_OFFSET   0x00000064U
 Acceptance Filter Mask 1. More...
 
#define XCANPS_AFIR1_OFFSET   0x00000068U
 Acceptance Filter ID 1. More...
 
#define XCANPS_AFMR2_OFFSET   0x0000006CU
 Acceptance Filter Mask 2. More...
 
#define XCANPS_AFIR2_OFFSET   0x00000070U
 Acceptance Filter ID 2. More...
 
#define XCANPS_AFMR3_OFFSET   0x00000074U
 Acceptance Filter Mask 3. More...
 
#define XCANPS_AFIR3_OFFSET   0x00000078U
 Acceptance Filter ID 3. More...
 
#define XCANPS_AFMR4_OFFSET   0x0000007CU
 Acceptance Filter Mask 4. More...
 
#define XCANPS_AFIR4_OFFSET   0x00000080U
 Acceptance Filter ID 4. More...
 

Software Reset Register (SRR) Bit Definitions and Masks

#define XCANPS_SRR_CEN_MASK   0x00000002U
 Can Enable. More...
 
#define XCANPS_SRR_SRST_MASK   0x00000001U
 Reset. More...
 

Mode Select Register (MSR) Bit Definitions and Masks

#define XCANPS_MSR_SNOOP_MASK   0x00000004U
 Snoop Mode Select. More...
 
#define XCANPS_MSR_LBACK_MASK   0x00000002U
 Loop Back Mode Select. More...
 
#define XCANPS_MSR_SLEEP_MASK   0x00000001U
 Sleep Mode Select. More...
 

Baud Rate Prescaler register (BRPR) Bit Definitions and Masks

#define XCANPS_BRPR_BRP_MASK   0x000000FFU
 Baud Rate Prescaler. More...
 

Bit Timing Register (BTR) Bit Definitions and Masks

#define XCANPS_BTR_SJW_MASK   0x00000180U
 Synchronization Jump Width. More...
 
#define XCANPS_BTR_SJW_SHIFT   7U
 
#define XCANPS_BTR_TS2_MASK   0x00000070U
 Time Segment 2. More...
 
#define XCANPS_BTR_TS2_SHIFT   4U
 
#define XCANPS_BTR_TS1_MASK   0x0000000FU
 Time Segment 1. More...
 

Error Counter Register (ECR) Bit Definitions and Masks

#define XCANPS_ECR_REC_MASK   0x0000FF00U
 Receive Error Counter. More...
 
#define XCANPS_ECR_REC_SHIFT   8U
 
#define XCANPS_ECR_TEC_MASK   0x000000FFU
 Transmit Error Counter. More...
 

Error Status Register (ESR) Bit Definitions and Masks

#define XCANPS_ESR_ACKER_MASK   0x00000010U
 ACK Error. More...
 
#define XCANPS_ESR_BERR_MASK   0x00000008U
 Bit Error. More...
 
#define XCANPS_ESR_STER_MASK   0x00000004U
 Stuff Error. More...
 
#define XCANPS_ESR_FMER_MASK   0x00000002U
 Form Error. More...
 
#define XCANPS_ESR_CRCER_MASK   0x00000001U
 CRC Error. More...
 

Status Register (SR) Bit Definitions and Masks

#define XCANPS_SR_SNOOP_MASK   0x00001000U
 Snoop Mask. More...
 
#define XCANPS_SR_ACFBSY_MASK   0x00000800U
 Acceptance Filter busy. More...
 
#define XCANPS_SR_TXFLL_MASK   0x00000400U
 TX FIFO is full. More...
 
#define XCANPS_SR_TXBFLL_MASK   0x00000200U
 TX High Priority Buffer full. More...
 
#define XCANPS_SR_ESTAT_MASK   0x00000180U
 Error Status. More...
 
#define XCANPS_SR_ESTAT_SHIFT   7U
 
#define XCANPS_SR_ERRWRN_MASK   0x00000040U
 Error Warning. More...
 
#define XCANPS_SR_BBSY_MASK   0x00000020U
 Bus Busy. More...
 
#define XCANPS_SR_BIDLE_MASK   0x00000010U
 Bus Idle. More...
 
#define XCANPS_SR_NORMAL_MASK   0x00000008U
 Normal Mode. More...
 
#define XCANPS_SR_SLEEP_MASK   0x00000004U
 Sleep Mode. More...
 
#define XCANPS_SR_LBACK_MASK   0x00000002U
 Loop Back Mode. More...
 
#define XCANPS_SR_CONFIG_MASK   0x00000001U
 Configuration Mode. More...
 

Interrupt Status/Enable/Clear Register Bit Definitions and Masks

#define XCANPS_IXR_TXFEMP_MASK   0x00004000U
 Tx Fifo Empty Interrupt. More...
 
#define XCANPS_IXR_TXFWMEMP_MASK   0x00002000U
 Tx Fifo Watermark Empty. More...
 
#define XCANPS_IXR_RXFWMFLL_MASK   0x00001000U
 Rx FIFO Watermark Full. More...
 
#define XCANPS_IXR_WKUP_MASK   0x00000800U
 Wake up Interrupt. More...
 
#define XCANPS_IXR_SLP_MASK   0x00000400U
 Sleep Interrupt. More...
 
#define XCANPS_IXR_BSOFF_MASK   0x00000200U
 Bus Off Interrupt. More...
 
#define XCANPS_IXR_ERROR_MASK   0x00000100U
 Error Interrupt. More...
 
#define XCANPS_IXR_RXNEMP_MASK   0x00000080U
 RX FIFO Not Empty Interrupt. More...
 
#define XCANPS_IXR_RXOFLW_MASK   0x00000040U
 RX FIFO Overflow Interrupt. More...
 
#define XCANPS_IXR_RXUFLW_MASK   0x00000020U
 RX FIFO Underflow Interrupt. More...
 
#define XCANPS_IXR_RXOK_MASK   0x00000010U
 New Message Received Intr. More...
 
#define XCANPS_IXR_TXBFLL_MASK   0x00000008U
 TX High Priority Buf Full. More...
 
#define XCANPS_IXR_TXFLL_MASK   0x00000004U
 TX FIFO Full Interrupt. More...
 
#define XCANPS_IXR_TXOK_MASK   0x00000002U
 TX Successful Interrupt. More...
 
#define XCANPS_IXR_ARBLST_MASK   0x00000001U
 Arbitration Lost Interrupt. More...
 
#define XCANPS_IXR_ALL
 

CAN Timestamp Control Register (TCR) Bit Definitions and Masks

#define XCANPS_TCR_CTS_MASK   0x00000001U
 Clear Timestamp counter mask. More...
 

CAN Watermark Register (WIR) Bit Definitions and Masks

#define XCANPS_WIR_FW_MASK   0x0000003FU
 Rx Full Threshold mask. More...
 
#define XCANPS_WIR_EW_MASK   0x00003F00U
 Tx Empty Threshold mask. More...
 
#define XCANPS_WIR_EW_SHIFT   0x00000008U
 Tx Empty Threshold shift. More...
 

CAN Frame Identifier (TX High Priority Buffer/TX/RX/Acceptance Filter

Mask/Acceptance Filter ID)

#define XCANPS_IDR_ID1_MASK   0xFFE00000U
 Standard Messg Identifier. More...
 
#define XCANPS_IDR_ID1_SHIFT   21U
 
#define XCANPS_IDR_SRR_MASK   0x00100000U
 Substitute Remote TX Req. More...
 
#define XCANPS_IDR_SRR_SHIFT   20U
 
#define XCANPS_IDR_IDE_MASK   0x00080000U
 Identifier Extension. More...
 
#define XCANPS_IDR_IDE_SHIFT   19U
 
#define XCANPS_IDR_ID2_MASK   0x0007FFFEU
 Extended Message Ident. More...
 
#define XCANPS_IDR_ID2_SHIFT   1U
 
#define XCANPS_IDR_RTR_MASK   0x00000001U
 Remote TX Request. More...
 

CAN Frame Data Length Code (TX High Priority Buffer/TX/RX)

#define XCANPS_DLCR_DLC_MASK   0xF0000000U
 Data Length Code. More...
 
#define XCANPS_DLCR_DLC_SHIFT   28U
 
#define XCANPS_DLCR_TIMESTAMP_MASK   0x0000FFFFU
 Timestamp Mask (Rx only) More...
 

CAN Frame Data Word 1 (TX High Priority Buffer/TX/RX)

#define XCANPS_DW1R_DB0_MASK   0xFF000000U
 Data Byte 0. More...
 
#define XCANPS_DW1R_DB0_SHIFT   24U
 
#define XCANPS_DW1R_DB1_MASK   0x00FF0000U
 Data Byte 1. More...
 
#define XCANPS_DW1R_DB1_SHIFT   16U
 
#define XCANPS_DW1R_DB2_MASK   0x0000FF00U
 Data Byte 2. More...
 
#define XCANPS_DW1R_DB2_SHIFT   8U
 
#define XCANPS_DW1R_DB3_MASK   0x000000FFU
 Data Byte 3. More...
 

CAN Frame Data Word 2 (TX High Priority Buffer/TX/RX)

#define XCANPS_DW2R_DB4_MASK   0xFF000000U
 Data Byte 4. More...
 
#define XCANPS_DW2R_DB4_SHIFT   24U
 
#define XCANPS_DW2R_DB5_MASK   0x00FF0000U
 Data Byte 5. More...
 
#define XCANPS_DW2R_DB5_SHIFT   16U
 
#define XCANPS_DW2R_DB6_MASK   0x0000FF00U
 Data Byte 6. More...
 
#define XCANPS_DW2R_DB6_SHIFT   8U
 
#define XCANPS_DW2R_DB7_MASK   0x000000FFU
 Data Byte 7. More...
 

Acceptance Filter Register (AFR) Bit Definitions and Masks

#define XCANPS_AFR_UAF4_MASK   0x00000008U
 Use Acceptance Filter No.4. More...
 
#define XCANPS_AFR_UAF3_MASK   0x00000004U
 Use Acceptance Filter No.3. More...
 
#define XCANPS_AFR_UAF2_MASK   0x00000002U
 Use Acceptance Filter No.2. More...
 
#define XCANPS_AFR_UAF1_MASK   0x00000001U
 Use Acceptance Filter No.1. More...
 
#define XCANPS_AFR_UAF_ALL_MASK
 

CAN frame length constants

#define XCANPS_MAX_FRAME_SIZE   sizeof(u32)*16U
 Maximum CAN frame length in bytes. More...
 

Macro Definition Documentation

◆ XCANPS_AFIR1_OFFSET

#define XCANPS_AFIR1_OFFSET   0x00000068U

#include <xcanps_hw.h>

Acceptance Filter ID 1.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFIR2_OFFSET

#define XCANPS_AFIR2_OFFSET   0x00000070U

#include <xcanps_hw.h>

Acceptance Filter ID 2.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFIR3_OFFSET

#define XCANPS_AFIR3_OFFSET   0x00000078U

#include <xcanps_hw.h>

Acceptance Filter ID 3.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFIR4_OFFSET

#define XCANPS_AFIR4_OFFSET   0x00000080U

#include <xcanps_hw.h>

Acceptance Filter ID 4.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFMR1_OFFSET

#define XCANPS_AFMR1_OFFSET   0x00000064U

#include <xcanps_hw.h>

Acceptance Filter Mask 1.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFMR2_OFFSET

#define XCANPS_AFMR2_OFFSET   0x0000006CU

#include <xcanps_hw.h>

Acceptance Filter Mask 2.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFMR3_OFFSET

#define XCANPS_AFMR3_OFFSET   0x00000074U

#include <xcanps_hw.h>

Acceptance Filter Mask 3.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFMR4_OFFSET

#define XCANPS_AFMR4_OFFSET   0x0000007CU

#include <xcanps_hw.h>

Acceptance Filter Mask 4.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFR_OFFSET

#define XCANPS_AFR_OFFSET   0x00000060U

#include <xcanps_hw.h>

Acceptance Filter Register.

Referenced by XCanPs_AcceptFilterDisable(), XCanPs_AcceptFilterEnable(), and XCanPs_AcceptFilterGetEnabled().

◆ XCANPS_AFR_UAF1_MASK

#define XCANPS_AFR_UAF1_MASK   0x00000001U

#include <xcanps_hw.h>

Use Acceptance Filter No.1.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFR_UAF2_MASK

#define XCANPS_AFR_UAF2_MASK   0x00000002U

#include <xcanps_hw.h>

Use Acceptance Filter No.2.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFR_UAF3_MASK

#define XCANPS_AFR_UAF3_MASK   0x00000004U

#include <xcanps_hw.h>

Use Acceptance Filter No.3.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_AFR_UAF4_MASK

#define XCANPS_AFR_UAF4_MASK   0x00000008U

#include <xcanps_hw.h>

Use Acceptance Filter No.4.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

◆ XCANPS_BRPR_BRP_MASK

#define XCANPS_BRPR_BRP_MASK   0x000000FFU

#include <xcanps_hw.h>

Baud Rate Prescaler.

◆ XCANPS_BRPR_OFFSET

#define XCANPS_BRPR_OFFSET   0x00000008U

#include <xcanps_hw.h>

Baud Rate Prescaler.

Referenced by XCanPs_GetBaudRatePrescaler(), and XCanPs_SetBaudRatePrescaler().

◆ XCANPS_BTR_OFFSET

#define XCANPS_BTR_OFFSET   0x0000000CU

#include <xcanps_hw.h>

Bit Timing Register.

Referenced by XCanPs_GetBitTiming().

◆ XCANPS_BTR_SJW_MASK

#define XCANPS_BTR_SJW_MASK   0x00000180U

#include <xcanps_hw.h>

Synchronization Jump Width.

◆ XCANPS_BTR_TS1_MASK

#define XCANPS_BTR_TS1_MASK   0x0000000FU

#include <xcanps_hw.h>

Time Segment 1.

Referenced by XCanPs_GetBitTiming(), and XCanPs_SetBitTiming().

◆ XCANPS_BTR_TS2_MASK

#define XCANPS_BTR_TS2_MASK   0x00000070U

#include <xcanps_hw.h>

Time Segment 2.

Referenced by XCanPs_GetBitTiming().

◆ XCanPs_ClearTimestamp

#define XCanPs_ClearTimestamp (   InstancePtr)

#include <xcanps.h>

Value:
XCanPs_WriteReg((InstancePtr)->CanConfig.BaseAddr, \
#define XCANPS_TCR_OFFSET
Timestamp Control Register.
Definition: xcanps_hw.h:92
#define XCANPS_TCR_CTS_MASK
Clear Timestamp counter mask.
Definition: xcanps_hw.h:224
#define XCanPs_WriteReg(BaseAddr, RegOffset, Data)
This macro writes the given register.
Definition: xcanps_hw.h:351

This macro clears the timestamp in the Timestamp Control Register.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
None.
Note
C-Style signature: void XCanPs_ClearTimestamp(XCanPs *InstancePtr)

◆ XCanPs_CreateDlcValue

#define XCanPs_CreateDlcValue (   DataLengCode)    (((DataLengCode) << XCANPS_DLCR_DLC_SHIFT) & XCANPS_DLCR_DLC_MASK)

#include <xcanps.h>

This macro calculates value for Data Length Code register given Data Length Code value.

Parameters
DataLengCodeindicates Data Length Code value.
Returns
Value that can be assigned to Data Length Code register.
Note
C-Style signature: u32 XCanPs_CreateDlcValue(u32 DataLengCode)

Read the CAN specification for meaning of Data Length Code.

◆ XCanPs_CreateIdValue

#define XCanPs_CreateIdValue (   StandardId,
  SubRemoteTransReq,
  IdExtension,
  ExtendedId,
  RemoteTransReq 
)

#include <xcanps.h>

Value:
((((StandardId) << XCANPS_IDR_ID1_SHIFT) & XCANPS_IDR_ID1_MASK) | \
(((SubRemoteTransReq) << XCANPS_IDR_SRR_SHIFT) & XCANPS_IDR_SRR_MASK)|\
(((IdExtension) << XCANPS_IDR_IDE_SHIFT) & XCANPS_IDR_IDE_MASK) | \
(((ExtendedId) << XCANPS_IDR_ID2_SHIFT) & XCANPS_IDR_ID2_MASK) | \
((RemoteTransReq) & XCANPS_IDR_RTR_MASK))
#define XCANPS_IDR_ID1_MASK
Standard Messg Identifier.
Definition: xcanps_hw.h:240
#define XCANPS_IDR_ID2_MASK
Extended Message Ident.
Definition: xcanps_hw.h:246
#define XCANPS_IDR_RTR_MASK
Remote TX Request.
Definition: xcanps_hw.h:248
#define XCANPS_IDR_IDE_MASK
Identifier Extension.
Definition: xcanps_hw.h:244
#define XCANPS_IDR_SRR_MASK
Substitute Remote TX Req.
Definition: xcanps_hw.h:242

This macro calculates CAN message identifier value given identifier field values.

Parameters
StandardIdcontains Standard Message ID value.
SubRemoteTransReqcontains Substitute Remote Transmission Request value.
IdExtensioncontains Identifier Extension value.
ExtendedIdcontains Extended Message ID value.
RemoteTransReqcontains Remote Transmission Request value.
Returns
Message Identifier value.
Note
C-Style signature: u32 XCanPs_CreateIdValue(u32 StandardId, u32 SubRemoteTransReq, u32 IdExtension, u32 ExtendedId, u32 RemoteTransReq)

Read the CAN specification for meaning of each parameter.

◆ XCANPS_DLCR_DLC_MASK

#define XCANPS_DLCR_DLC_MASK   0xF0000000U

#include <xcanps_hw.h>

Data Length Code.

◆ XCANPS_DLCR_TIMESTAMP_MASK

#define XCANPS_DLCR_TIMESTAMP_MASK   0x0000FFFFU

#include <xcanps_hw.h>

Timestamp Mask (Rx only)

◆ XCANPS_DW1R_DB0_MASK

#define XCANPS_DW1R_DB0_MASK   0xFF000000U

#include <xcanps_hw.h>

Data Byte 0.

◆ XCANPS_DW1R_DB1_MASK

#define XCANPS_DW1R_DB1_MASK   0x00FF0000U

#include <xcanps_hw.h>

Data Byte 1.

◆ XCANPS_DW1R_DB2_MASK

#define XCANPS_DW1R_DB2_MASK   0x0000FF00U

#include <xcanps_hw.h>

Data Byte 2.

◆ XCANPS_DW1R_DB3_MASK

#define XCANPS_DW1R_DB3_MASK   0x000000FFU

#include <xcanps_hw.h>

Data Byte 3.

◆ XCANPS_DW2R_DB4_MASK

#define XCANPS_DW2R_DB4_MASK   0xFF000000U

#include <xcanps_hw.h>

Data Byte 4.

◆ XCANPS_DW2R_DB5_MASK

#define XCANPS_DW2R_DB5_MASK   0x00FF0000U

#include <xcanps_hw.h>

Data Byte 5.

◆ XCANPS_DW2R_DB6_MASK

#define XCANPS_DW2R_DB6_MASK   0x0000FF00U

#include <xcanps_hw.h>

Data Byte 6.

◆ XCANPS_DW2R_DB7_MASK

#define XCANPS_DW2R_DB7_MASK   0x000000FFU

#include <xcanps_hw.h>

Data Byte 7.

◆ XCANPS_ECR_OFFSET

#define XCANPS_ECR_OFFSET   0x00000010U

#include <xcanps_hw.h>

Error Counter Register.

Referenced by XCanPs_GetBusErrorCounter().

◆ XCANPS_ECR_REC_MASK

#define XCANPS_ECR_REC_MASK   0x0000FF00U

#include <xcanps_hw.h>

Receive Error Counter.

Referenced by XCanPs_GetBusErrorCounter().

◆ XCANPS_ECR_TEC_MASK

#define XCANPS_ECR_TEC_MASK   0x000000FFU

#include <xcanps_hw.h>

Transmit Error Counter.

◆ XCANPS_ESR_ACKER_MASK

#define XCANPS_ESR_ACKER_MASK   0x00000010U

#include <xcanps_hw.h>

ACK Error.

◆ XCANPS_ESR_BERR_MASK

#define XCANPS_ESR_BERR_MASK   0x00000008U

#include <xcanps_hw.h>

Bit Error.

◆ XCANPS_ESR_CRCER_MASK

#define XCANPS_ESR_CRCER_MASK   0x00000001U

#include <xcanps_hw.h>

CRC Error.

◆ XCANPS_ESR_FMER_MASK

#define XCANPS_ESR_FMER_MASK   0x00000002U

#include <xcanps_hw.h>

Form Error.

◆ XCANPS_ESR_OFFSET

#define XCANPS_ESR_OFFSET   0x00000014U

#include <xcanps_hw.h>

Error Status Register.

Referenced by XCanPs_ClearBusErrorStatus(), and XCanPs_GetBusErrorStatus().

◆ XCANPS_ESR_STER_MASK

#define XCANPS_ESR_STER_MASK   0x00000004U

#include <xcanps_hw.h>

Stuff Error.

◆ XCANPS_HANDLER_ERROR

#define XCANPS_HANDLER_ERROR   3U

#include <xcanps.h>

Handler type for error interrupt.

Referenced by XCanPs_SetHandler().

◆ XCANPS_HANDLER_EVENT

#define XCANPS_HANDLER_EVENT   4U

#include <xcanps.h>

Handler type for all other interrupts.

Referenced by XCanPs_SetHandler().

◆ XCANPS_HANDLER_RECV

#define XCANPS_HANDLER_RECV   2U

#include <xcanps.h>

Handler type for frame reception interrupt.

Referenced by XCanPs_SetHandler().

◆ XCANPS_HANDLER_SEND

#define XCANPS_HANDLER_SEND   1U

#include <xcanps.h>

Handler type for frame sending interrupt.

Referenced by XCanPs_SetHandler().

◆ XCANPS_ICR_OFFSET

#define XCANPS_ICR_OFFSET   0x00000024U

#include <xcanps_hw.h>

Interrupt Clear Register.

Referenced by XCanPs_IntrClear().

◆ XCANPS_IDR_ID1_MASK

#define XCANPS_IDR_ID1_MASK   0xFFE00000U

#include <xcanps_hw.h>

Standard Messg Identifier.

◆ XCANPS_IDR_ID2_MASK

#define XCANPS_IDR_ID2_MASK   0x0007FFFEU

#include <xcanps_hw.h>

Extended Message Ident.

◆ XCANPS_IDR_IDE_MASK

#define XCANPS_IDR_IDE_MASK   0x00080000U

#include <xcanps_hw.h>

Identifier Extension.

◆ XCANPS_IDR_RTR_MASK

#define XCANPS_IDR_RTR_MASK   0x00000001U

#include <xcanps_hw.h>

Remote TX Request.

◆ XCANPS_IDR_SRR_MASK

#define XCANPS_IDR_SRR_MASK   0x00100000U

#include <xcanps_hw.h>

Substitute Remote TX Req.

◆ XCANPS_IER_OFFSET

#define XCANPS_IER_OFFSET   0x00000020U

#include <xcanps_hw.h>

Interrupt Enable Register.

Referenced by XCanPs_IntrDisable(), XCanPs_IntrEnable(), and XCanPs_IntrGetEnabled().

◆ XCanPs_IsAcceptFilterBusy

#define XCanPs_IsAcceptFilterBusy (   InstancePtr)

#include <xcanps.h>

Value:
(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
XCANPS_SR_OFFSET) & XCANPS_SR_ACFBSY_MASK) != (u32)0) ? TRUE : FALSE)
#define XCANPS_SR_ACFBSY_MASK
Acceptance Filter busy.
Definition: xcanps_hw.h:174
#define XCANPS_SR_OFFSET
Status Register.
Definition: xcanps_hw.h:87
#define XCanPs_ReadReg(BaseAddr, RegOffset)
This macro reads the given register.
Definition: xcanps_hw.h:333

This macro checks if the CAN device is ready for the driver to change Acceptance Filter Identifier Registers (AFIR) and Acceptance Filter Mask Registers (AFMR).

AFIR and AFMR for a filter are changeable only after the filter is disabled and this routine returns FALSE. The filter can be disabled using the XCanPs_AcceptFilterDisable function.

Use the XCanPs_Accept_* functions for configuring the acceptance filters.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
  • TRUE if the device is busy and NOT ready to accept writes to AFIR and AFMR.
  • FALSE if the device is ready to accept writes to AFIR and AFMR.
Note
C-Style signature: int XCanPs_IsAcceptFilterBusy(XCanPs *InstancePtr)

Referenced by XCanPs_AcceptFilterSet().

◆ XCanPs_IsHighPriorityBufFull

#define XCanPs_IsHighPriorityBufFull (   InstancePtr)

#include <xcanps.h>

Value:
(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
XCANPS_SR_OFFSET) & XCANPS_SR_TXBFLL_MASK) != (u32)0) ? TRUE : FALSE)
#define XCANPS_SR_TXBFLL_MASK
TX High Priority Buffer full.
Definition: xcanps_hw.h:176
#define XCANPS_SR_OFFSET
Status Register.
Definition: xcanps_hw.h:87
#define XCanPs_ReadReg(BaseAddr, RegOffset)
This macro reads the given register.
Definition: xcanps_hw.h:333

This macro checks if the Transmission High Priority Buffer is full.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
  • TRUE if the TX High Priority Buffer is full.
  • FALSE if the TX High Priority Buffer is NOT full.
Note
C-Style signature: int XCanPs_IsHighPriorityBufFull(XCanPs *InstancePtr)

Referenced by XCanPs_SendHighPriority().

◆ XCANPS_ISR_OFFSET

#define XCANPS_ISR_OFFSET   0x0000001CU

#include <xcanps_hw.h>

Interrupt Status Register.

Referenced by XCanPs_IntrGetStatus().

◆ XCanPs_IsRxEmpty

#define XCanPs_IsRxEmpty (   InstancePtr)

#include <xcanps.h>

Value:
(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
XCANPS_ISR_OFFSET) & XCANPS_IXR_RXNEMP_MASK) != (u32)0) ? FALSE : TRUE)
#define XCANPS_ISR_OFFSET
Interrupt Status Register.
Definition: xcanps_hw.h:89
#define XCANPS_IXR_RXNEMP_MASK
RX FIFO Not Empty Interrupt.
Definition: xcanps_hw.h:198
#define XCanPs_ReadReg(BaseAddr, RegOffset)
This macro reads the given register.
Definition: xcanps_hw.h:333

This macro checks if the receive FIFO is empty.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
  • TRUE if RX FIFO is empty.
  • FALSE if the RX FIFO is NOT empty.
Note
C-Style signature: int XCanPs_IsRxEmpty(XCanPs *InstancePtr)

Referenced by XCanPs_Recv().

◆ XCanPs_IsTxDone

#define XCanPs_IsTxDone (   InstancePtr)

#include <xcanps.h>

Value:
(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
XCANPS_ISR_OFFSET) & XCANPS_IXR_TXOK_MASK) != (u32)0) ? TRUE : FALSE)
#define XCANPS_IXR_TXOK_MASK
TX Successful Interrupt.
Definition: xcanps_hw.h:204
#define XCANPS_ISR_OFFSET
Interrupt Status Register.
Definition: xcanps_hw.h:89
#define XCanPs_ReadReg(BaseAddr, RegOffset)
This macro reads the given register.
Definition: xcanps_hw.h:333

This macro checks if the transmission is complete.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
  • TRUE if the transmission is done.
  • FALSE if the transmission is not done.
Note
C-Style signature: int XCanPs_IsTxDone(XCanPs *InstancePtr)

◆ XCanPs_IsTxFifoFull

#define XCanPs_IsTxFifoFull (   InstancePtr)

#include <xcanps.h>

Value:
(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
XCANPS_SR_OFFSET) & XCANPS_SR_TXFLL_MASK) != (u32)0) ? TRUE : FALSE)
#define XCANPS_SR_TXFLL_MASK
TX FIFO is full.
Definition: xcanps_hw.h:175
#define XCANPS_SR_OFFSET
Status Register.
Definition: xcanps_hw.h:87
#define XCanPs_ReadReg(BaseAddr, RegOffset)
This macro reads the given register.
Definition: xcanps_hw.h:333

This macro checks if the transmission FIFO is full.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
  • TRUE if TX FIFO is full.
  • FALSE if the TX FIFO is NOT full.
Note
C-Style signature: int XCanPs_IsTxFifoFull(XCanPs *InstancePtr)

Referenced by XCanPs_Send().

◆ XCANPS_IXR_ARBLST_MASK

#define XCANPS_IXR_ARBLST_MASK   0x00000001U

#include <xcanps_hw.h>

Arbitration Lost Interrupt.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_BSOFF_MASK

#define XCANPS_IXR_BSOFF_MASK   0x00000200U

#include <xcanps_hw.h>

Bus Off Interrupt.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_ERROR_MASK

#define XCANPS_IXR_ERROR_MASK   0x00000100U

#include <xcanps_hw.h>

Error Interrupt.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_RXFWMFLL_MASK

#define XCANPS_IXR_RXFWMFLL_MASK   0x00001000U

#include <xcanps_hw.h>

Rx FIFO Watermark Full.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_RXNEMP_MASK

#define XCANPS_IXR_RXNEMP_MASK   0x00000080U

#include <xcanps_hw.h>

RX FIFO Not Empty Interrupt.

Referenced by XCanPs_IntrHandler(), and XCanPs_Recv().

◆ XCANPS_IXR_RXOFLW_MASK

#define XCANPS_IXR_RXOFLW_MASK   0x00000040U

#include <xcanps_hw.h>

RX FIFO Overflow Interrupt.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_RXOK_MASK

#define XCANPS_IXR_RXOK_MASK   0x00000010U

#include <xcanps_hw.h>

New Message Received Intr.

◆ XCANPS_IXR_RXUFLW_MASK

#define XCANPS_IXR_RXUFLW_MASK   0x00000020U

#include <xcanps_hw.h>

RX FIFO Underflow Interrupt.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_SLP_MASK

#define XCANPS_IXR_SLP_MASK   0x00000400U

#include <xcanps_hw.h>

Sleep Interrupt.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_TXBFLL_MASK

#define XCANPS_IXR_TXBFLL_MASK   0x00000008U

#include <xcanps_hw.h>

TX High Priority Buf Full.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_TXFEMP_MASK

#define XCANPS_IXR_TXFEMP_MASK   0x00004000U

#include <xcanps_hw.h>

Tx Fifo Empty Interrupt.

◆ XCANPS_IXR_TXFLL_MASK

#define XCANPS_IXR_TXFLL_MASK   0x00000004U

#include <xcanps_hw.h>

TX FIFO Full Interrupt.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_TXFWMEMP_MASK

#define XCANPS_IXR_TXFWMEMP_MASK   0x00002000U

#include <xcanps_hw.h>

Tx Fifo Watermark Empty.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_TXOK_MASK

#define XCANPS_IXR_TXOK_MASK   0x00000002U

#include <xcanps_hw.h>

TX Successful Interrupt.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_IXR_WKUP_MASK

#define XCANPS_IXR_WKUP_MASK   0x00000800U

#include <xcanps_hw.h>

Wake up Interrupt.

Referenced by XCanPs_IntrHandler().

◆ XCANPS_MAX_FRAME_SIZE

#define XCANPS_MAX_FRAME_SIZE   sizeof(u32)*16U

#include <xcanps_hw.h>

Maximum CAN frame length in bytes.

◆ XCANPS_MODE_CONFIG

#define XCANPS_MODE_CONFIG   0x00000001U

◆ XCANPS_MODE_LOOPBACK

#define XCANPS_MODE_LOOPBACK   0x00000004U

#include <xcanps.h>

Loop Back mode.

Referenced by XCanPs_EnterMode(), XCanPs_GetMode(), and XCanPs_SelfTest().

◆ XCANPS_MODE_NORMAL

#define XCANPS_MODE_NORMAL   0x00000002U

#include <xcanps.h>

Normal mode.

Referenced by XCanPs_EnterMode(), and XCanPs_GetMode().

◆ XCANPS_MODE_SLEEP

#define XCANPS_MODE_SLEEP   0x00000008U

#include <xcanps.h>

Sleep mode.

Referenced by XCanPs_EnterMode(), and XCanPs_GetMode().

◆ XCANPS_MODE_SNOOP

#define XCANPS_MODE_SNOOP   0x00000010U

#include <xcanps.h>

Snoop mode.

Referenced by XCanPs_EnterMode(), and XCanPs_GetMode().

◆ XCANPS_MSR_LBACK_MASK

#define XCANPS_MSR_LBACK_MASK   0x00000002U

#include <xcanps_hw.h>

Loop Back Mode Select.

Referenced by XCanPs_EnterMode().

◆ XCANPS_MSR_OFFSET

#define XCANPS_MSR_OFFSET   0x00000004U

#include <xcanps_hw.h>

Mode Select Register.

Referenced by XCanPs_EnterMode().

◆ XCANPS_MSR_SLEEP_MASK

#define XCANPS_MSR_SLEEP_MASK   0x00000001U

#include <xcanps_hw.h>

Sleep Mode Select.

Referenced by XCanPs_EnterMode().

◆ XCANPS_MSR_SNOOP_MASK

#define XCANPS_MSR_SNOOP_MASK   0x00000004U

#include <xcanps_hw.h>

Snoop Mode Select.

Referenced by XCanPs_EnterMode().

◆ XCanPs_ReadReg

#define XCanPs_ReadReg (   BaseAddr,
  RegOffset 
)    Xil_In32((BaseAddr) + (u32)(RegOffset))

◆ XCANPS_RXFIFO_DLC_OFFSET

#define XCANPS_RXFIFO_DLC_OFFSET   0x00000054U

#include <xcanps_hw.h>

RX FIFO DLC.

Referenced by XCanPs_Recv().

◆ XCANPS_RXFIFO_DW1_OFFSET

#define XCANPS_RXFIFO_DW1_OFFSET   0x00000058U

#include <xcanps_hw.h>

RX FIFO Data Word 1.

Referenced by XCanPs_Recv().

◆ XCANPS_RXFIFO_DW2_OFFSET

#define XCANPS_RXFIFO_DW2_OFFSET   0x0000005CU

#include <xcanps_hw.h>

RX FIFO Data Word 2.

Referenced by XCanPs_Recv().

◆ XCANPS_RXFIFO_ID_OFFSET

#define XCANPS_RXFIFO_ID_OFFSET   0x00000050U

#include <xcanps_hw.h>

RX FIFO ID.

Referenced by XCanPs_Recv().

◆ XCANPS_SR_ACFBSY_MASK

#define XCANPS_SR_ACFBSY_MASK   0x00000800U

#include <xcanps_hw.h>

Acceptance Filter busy.

◆ XCANPS_SR_BBSY_MASK

#define XCANPS_SR_BBSY_MASK   0x00000020U

#include <xcanps_hw.h>

Bus Busy.

◆ XCANPS_SR_BIDLE_MASK

#define XCANPS_SR_BIDLE_MASK   0x00000010U

#include <xcanps_hw.h>

Bus Idle.

◆ XCANPS_SR_CONFIG_MASK

#define XCANPS_SR_CONFIG_MASK   0x00000001U

#include <xcanps_hw.h>

Configuration Mode.

Referenced by XCanPs_GetMode().

◆ XCANPS_SR_ERRWRN_MASK

#define XCANPS_SR_ERRWRN_MASK   0x00000040U

#include <xcanps_hw.h>

Error Warning.

◆ XCANPS_SR_ESTAT_MASK

#define XCANPS_SR_ESTAT_MASK   0x00000180U

#include <xcanps_hw.h>

Error Status.

◆ XCANPS_SR_LBACK_MASK

#define XCANPS_SR_LBACK_MASK   0x00000002U

#include <xcanps_hw.h>

Loop Back Mode.

◆ XCANPS_SR_NORMAL_MASK

#define XCANPS_SR_NORMAL_MASK   0x00000008U

#include <xcanps_hw.h>

Normal Mode.

Referenced by XCanPs_GetMode().

◆ XCANPS_SR_OFFSET

#define XCANPS_SR_OFFSET   0x00000018U

#include <xcanps_hw.h>

Status Register.

Referenced by XCanPs_GetStatus().

◆ XCANPS_SR_SLEEP_MASK

#define XCANPS_SR_SLEEP_MASK   0x00000004U

#include <xcanps_hw.h>

Sleep Mode.

Referenced by XCanPs_GetMode().

◆ XCANPS_SR_SNOOP_MASK

#define XCANPS_SR_SNOOP_MASK   0x00001000U

#include <xcanps_hw.h>

Snoop Mask.

Referenced by XCanPs_GetMode().

◆ XCANPS_SR_TXBFLL_MASK

#define XCANPS_SR_TXBFLL_MASK   0x00000200U

#include <xcanps_hw.h>

TX High Priority Buffer full.

◆ XCANPS_SR_TXFLL_MASK

#define XCANPS_SR_TXFLL_MASK   0x00000400U

#include <xcanps_hw.h>

TX FIFO is full.

◆ XCANPS_SRR_CEN_MASK

#define XCANPS_SRR_CEN_MASK   0x00000002U

#include <xcanps_hw.h>

Can Enable.

Referenced by XCanPs_EnterMode().

◆ XCANPS_SRR_OFFSET

#define XCANPS_SRR_OFFSET   0x00000000U

#include <xcanps_hw.h>

Software Reset Register.

Referenced by XCanPs_EnterMode(), XCanPs_Reset(), and XCanPs_ResetHw().

◆ XCANPS_SRR_SRST_MASK

#define XCANPS_SRR_SRST_MASK   0x00000001U

#include <xcanps_hw.h>

Reset.

Referenced by XCanPs_Reset(), and XCanPs_ResetHw().

◆ XCANPS_TCR_CTS_MASK

#define XCANPS_TCR_CTS_MASK   0x00000001U

#include <xcanps_hw.h>

Clear Timestamp counter mask.

◆ XCANPS_TCR_OFFSET

#define XCANPS_TCR_OFFSET   0x00000028U

#include <xcanps_hw.h>

Timestamp Control Register.

◆ XCANPS_TXFIFO_DLC_OFFSET

#define XCANPS_TXFIFO_DLC_OFFSET   0x00000034U

#include <xcanps_hw.h>

TX FIFO DLC.

Referenced by XCanPs_Send().

◆ XCANPS_TXFIFO_DW1_OFFSET

#define XCANPS_TXFIFO_DW1_OFFSET   0x00000038U

#include <xcanps_hw.h>

TX FIFO Data Word 1.

Referenced by XCanPs_Send().

◆ XCANPS_TXFIFO_DW2_OFFSET

#define XCANPS_TXFIFO_DW2_OFFSET   0x0000003CU

#include <xcanps_hw.h>

TX FIFO Data Word 2.

Referenced by XCanPs_Send().

◆ XCANPS_TXFIFO_ID_OFFSET

#define XCANPS_TXFIFO_ID_OFFSET   0x00000030U

#include <xcanps_hw.h>

TX FIFO ID.

Referenced by XCanPs_Send().

◆ XCANPS_TXHPB_DLC_OFFSET

#define XCANPS_TXHPB_DLC_OFFSET   0x00000044U

#include <xcanps_hw.h>

TX High Priority Buffer DLC.

Referenced by XCanPs_SendHighPriority().

◆ XCANPS_TXHPB_DW1_OFFSET

#define XCANPS_TXHPB_DW1_OFFSET   0x00000048U

#include <xcanps_hw.h>

TX High Priority Buf Data 1.

Referenced by XCanPs_SendHighPriority().

◆ XCANPS_TXHPB_DW2_OFFSET

#define XCANPS_TXHPB_DW2_OFFSET   0x0000004CU

#include <xcanps_hw.h>

TX High Priority Buf Data Word 2.

Referenced by XCanPs_SendHighPriority().

◆ XCANPS_TXHPB_ID_OFFSET

#define XCANPS_TXHPB_ID_OFFSET   0x00000040U

#include <xcanps_hw.h>

TX High Priority Buffer ID.

Referenced by XCanPs_SendHighPriority().

◆ XCANPS_WIR_EW_MASK

#define XCANPS_WIR_EW_MASK   0x00003F00U

#include <xcanps_hw.h>

Tx Empty Threshold mask.

Referenced by XCanPs_GetTxIntrWatermark(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

◆ XCANPS_WIR_EW_SHIFT

#define XCANPS_WIR_EW_SHIFT   0x00000008U

#include <xcanps_hw.h>

Tx Empty Threshold shift.

Referenced by XCanPs_GetTxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

◆ XCANPS_WIR_FW_MASK

#define XCANPS_WIR_FW_MASK   0x0000003FU

◆ XCANPS_WIR_OFFSET

#define XCANPS_WIR_OFFSET   0x0000002CU

◆ XCanPs_WriteReg

#define XCanPs_WriteReg (   BaseAddr,
  RegOffset,
  Data 
)    Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data))

#include <xcanps_hw.h>

This macro writes the given register.

Parameters
BaseAddris the base address of the device.
RegOffsetis the register offset to be written.
Datais the 32-bit value to write to the register.
Returns
None.
Note
None.

Referenced by XCanPs_AcceptFilterSet(), XCanPs_ClearBusErrorStatus(), XCanPs_EnterMode(), XCanPs_IntrClear(), XCanPs_IntrDisable(), XCanPs_IntrEnable(), XCanPs_Reset(), XCanPs_ResetHw(), XCanPs_Send(), XCanPs_SendHighPriority(), XCanPs_SetBaudRatePrescaler(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

Typedef Documentation

◆ XCanPs_ErrorHandler

typedef void(* XCanPs_ErrorHandler) (void *CallBackRef, u32 ErrorMask)

#include <xcanps.h>

Callback type for error interrupt.

Parameters
CallBackRefis a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
ErrorMaskis a bit mask indicating the cause of the error. Its value equals 'OR'ing one or more XCANPS_ESR_* values defined in xcanps_hw.h

◆ XCanPs_EventHandler

typedef void(* XCanPs_EventHandler) (void *CallBackRef, u32 Mask)

#include <xcanps.h>

Callback type for all kinds of interrupts except sending frame interrupt, receiving frame interrupt, and error interrupt.

Parameters
CallBackRefis a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
Maskis a bit mask indicating the pending interrupts. Its value equals 'OR'ing one or more XCANPS_IXR_* defined in xcanps_hw.h

◆ XCanPs_SendRecvHandler

typedef void(* XCanPs_SendRecvHandler) (void *CallBackRef)

#include <xcanps.h>

Callback type for frame sending and reception interrupts.

Parameters
CallBackRefis a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.

Function Documentation

◆ XCanPs_AcceptFilterDisable()

void XCanPs_AcceptFilterDisable ( XCanPs InstancePtr,
u32  FilterIndexes 
)

#include <xcanps.c>

This routine disables individual acceptance filters.

Up to 4 filters could be disabled. If all acceptance filters are disabled then all the received frames are stored in the RX FIFO.

Parameters
InstancePtris a pointer to the XCanPs instance.
FilterIndexesspecifies which filter(s) to disable. Use any XCANPS_AFR_UAF*_MASK to disable one filter, and "Or" multiple XCANPS_AFR_UAF*_MASK values if multiple filters need to be disabled. Any filter not specified in this parameter will keep its previous enable/disable setting. If all acceptance filters are disabled then all received frames are stored in the RX FIFO.
Returns
None.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_AFR_OFFSET, and XCanPs_ReadReg.

◆ XCanPs_AcceptFilterEnable()

void XCanPs_AcceptFilterEnable ( XCanPs InstancePtr,
u32  FilterIndexes 
)

#include <xcanps.c>

This routine enables individual acceptance filters.

Up to 4 filters could be enabled.

Parameters
InstancePtris a pointer to the XCanPs instance.
FilterIndexesspecifies which filter(s) to enable. Use any XCANPS_AFR_UAF*_MASK to enable one filter, and "Or" multiple XCANPS_AFR_UAF*_MASK values if multiple filters need to be enabled. Any filter not specified in this parameter will keep its previous enable/disable setting.
Returns
None.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_AFR_OFFSET, and XCanPs_ReadReg.

◆ XCanPs_AcceptFilterGet()

void XCanPs_AcceptFilterGet ( XCanPs InstancePtr,
u32  FilterIndex,
u32 *  MaskValue,
u32 *  IdValue 
)

#include <xcanps.c>

This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter.

Use XCANPS_IDR_* defined in xcanps_hw.h to interpret the values. Read the xcanps.h file and device specification for details.

Parameters
InstancePtris a pointer to the XCanPs instance.
FilterIndexdefines which Acceptance Filter Mask Register to get Mask and ID from. Use any single XCANPS_FILTER_* value.
MaskValueis a pointer to the data in which the Mask value read from the chosen Acceptance Filter Mask Register is returned.
IdValueis a pointer to the data in which the ID value read from the chosen Acceptance Filter ID Register is returned.
Returns
None.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_AFIR1_OFFSET, XCANPS_AFIR2_OFFSET, XCANPS_AFIR3_OFFSET, XCANPS_AFIR4_OFFSET, XCANPS_AFMR1_OFFSET, XCANPS_AFMR2_OFFSET, XCANPS_AFMR3_OFFSET, XCANPS_AFMR4_OFFSET, XCANPS_AFR_UAF1_MASK, XCANPS_AFR_UAF2_MASK, XCANPS_AFR_UAF3_MASK, XCANPS_AFR_UAF4_MASK, and XCanPs_ReadReg.

◆ XCanPs_AcceptFilterGetEnabled()

u32 XCanPs_AcceptFilterGetEnabled ( XCanPs InstancePtr)

#include <xcanps.c>

This function returns enabled acceptance filters.

Use XCANPS_AFR_UAF*_MASK defined in xcanps_hw.h to interpret the returned value. If no acceptance filters are enabled then all received frames are stored in the RX FIFO.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
The value stored in Acceptance Filter Register.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_AFR_OFFSET, and XCanPs_ReadReg.

Referenced by XCanPs_AcceptFilterSet().

◆ XCanPs_AcceptFilterSet()

s32 XCanPs_AcceptFilterSet ( XCanPs InstancePtr,
u32  FilterIndex,
u32  MaskValue,
u32  IdValue 
)

#include <xcanps.c>

This function sets values to the Acceptance Filter Mask Register (AFMR) and Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter.

Use XCANPS_IDR_* defined in xcanps_hw.h to create the values to set the filter. Read the xcanps.h file and device specification for details.

This function should be called only after:

Parameters
InstancePtris a pointer to the XCanPs instance.
FilterIndexdefines which Acceptance Filter Mask and ID Register to set. Use any single XCANPS_AFR_UAF*_MASK value.
MaskValueis the value to write to the chosen Acceptance Filter Mask Register.
IdValueis the value to write to the chosen Acceptance Filter ID Register.
Returns
  • XST_SUCCESS if the values were set successfully.
  • XST_FAILURE if the given filter was not disabled, or the CAN device was not ready to accept writes to AFMR and AFIR.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_AcceptFilterGetEnabled(), XCANPS_AFIR1_OFFSET, XCANPS_AFIR2_OFFSET, XCANPS_AFIR3_OFFSET, XCANPS_AFIR4_OFFSET, XCANPS_AFMR1_OFFSET, XCANPS_AFMR2_OFFSET, XCANPS_AFMR3_OFFSET, XCANPS_AFMR4_OFFSET, XCANPS_AFR_UAF1_MASK, XCANPS_AFR_UAF2_MASK, XCANPS_AFR_UAF3_MASK, XCANPS_AFR_UAF4_MASK, XCanPs_IsAcceptFilterBusy, and XCanPs_WriteReg.

◆ XCanPs_ClearBusErrorStatus()

void XCanPs_ClearBusErrorStatus ( XCanPs InstancePtr,
u32  Mask 
)

#include <xcanps.c>

This function clears Error Status bit(s) previously set in Error Status Register (ESR).

Use the XCANPS_ESR_* constants defined in xcanps_hw.h to create the value to pass in. If a bit was cleared in Error Status Register before this function is called, it will not be modified.

Parameters
InstancePtris a pointer to the XCanPs instance.
Maskis he 32-bit mask used to clear bits in Error Status Register. Multiple XCANPS_ESR_* values can be 'OR'ed to clear multiple bits.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ESR_OFFSET, and XCanPs_WriteReg.

Referenced by XCanPs_IntrHandler().

◆ XCanPs_EnterMode()

void XCanPs_EnterMode ( XCanPs InstancePtr,
u8  OperationMode 
)

#include <xcanps.c>

This function allows the CAN device to enter one of the following operation modes:

  • Configuration Mode: Pass in parameter XCANPS_MODE_CONFIG
  • Sleep Mode: Pass in parameter XCANPS_MODE_SLEEP
  • Normal Mode: Pass in parameter XCANPS_MODE_NORMAL
  • Loop Back Mode: Pass in parameter XCANPS_MODE_LOOPBACK.
  • Snoop Mode: Pass in parameter XCANPS_MODE_SNOOP.

Read the xcanps.h file and device specification for detailed description of each operation mode.

Parameters
InstancePtris a pointer to the XCanPs instance.
OperationModespecify which operation mode to enter. Valid value is any of XCANPS_MODE_* defined in xcanps.h. Multiple modes can not be entered at the same time.
Returns
None.
Note

This function does NOT ensure CAN device enters the specified operation mode before it returns the control to the caller. The caller is responsible for checking current operation mode using XCanPs_GetMode().

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_GetMode(), XCANPS_MODE_CONFIG, XCANPS_MODE_LOOPBACK, XCANPS_MODE_NORMAL, XCANPS_MODE_SLEEP, XCANPS_MODE_SNOOP, XCANPS_MSR_LBACK_MASK, XCANPS_MSR_OFFSET, XCANPS_MSR_SLEEP_MASK, XCANPS_MSR_SNOOP_MASK, XCANPS_SRR_CEN_MASK, XCANPS_SRR_OFFSET, and XCanPs_WriteReg.

Referenced by XCanPs_SelfTest().

◆ XCanPs_GetBaudRatePrescaler()

u8 XCanPs_GetBaudRatePrescaler ( XCanPs InstancePtr)

#include <xcanps.c>

This routine gets Baud Rate Prescaler value.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
Current used Baud Rate Prescaler value. The value's range is from 0 to 255.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_BRPR_OFFSET, and XCanPs_ReadReg.

◆ XCanPs_GetBitTiming()

void XCanPs_GetBitTiming ( XCanPs InstancePtr,
u8 *  SyncJumpWidth,
u8 *  TimeSegment2,
u8 *  TimeSegment1 
)

#include <xcanps.c>

This routine gets Bit time.

Time segment 1, Time segment 2 and Synchronization Jump Width values are read in this function. According to device specification, the actual value of each of these fields is one more than the value read. Read the device specification for details.

Parameters
InstancePtris a pointer to the XCanPs instance.
SyncJumpWidthwill store the Synchronization Jump Width value after this function returns. Its value ranges from 0 to 3.
TimeSegment2will store the Time Segment 2 value after this function returns. Its value ranges from 0 to 7.
TimeSegment1will store the Time Segment 1 value after this function returns. Its value ranges from 0 to 15.
Returns
None.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_BTR_OFFSET, XCANPS_BTR_TS1_MASK, XCANPS_BTR_TS2_MASK, and XCanPs_ReadReg.

◆ XCanPs_GetBusErrorCounter()

void XCanPs_GetBusErrorCounter ( XCanPs InstancePtr,
u8 *  RxErrorCount,
u8 *  TxErrorCount 
)

#include <xcanps.c>

This function reads Receive and Transmit error counters.

Parameters
InstancePtris a pointer to the XCanPs instance.
RxErrorCountis a pointer to data in which the Receive Error counter value is returned.
TxErrorCountis a pointer to data in which the Transmit Error counter value is returned.
Returns
None.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ECR_OFFSET, XCANPS_ECR_REC_MASK, and XCanPs_ReadReg.

◆ XCanPs_GetBusErrorStatus()

u32 XCanPs_GetBusErrorStatus ( XCanPs InstancePtr)

#include <xcanps.c>

This function reads Error Status value from Error Status Register (ESR).

Use the XCANPS_ESR_* constants defined in xcanps_hw.h to interpret the returned value.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
The 32-bit value read from Error Status Register.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ESR_OFFSET, and XCanPs_ReadReg.

Referenced by XCanPs_IntrHandler().

◆ XCanPs_GetMode()

u8 XCanPs_GetMode ( XCanPs InstancePtr)

#include <xcanps.c>

This routine returns the current operation mode of the CAN device.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
  • XCANPS_MODE_CONFIG if the device is in Configuration Mode.
  • XCANPS_MODE_SLEEP if the device is in Sleep Mode.
  • XCANPS_MODE_NORMAL if the device is in Normal Mode.
  • XCANPS_MODE_LOOPBACK if the device is in Loop Back Mode.
  • XCANPS_MODE_SNOOP if the device is in Snoop Mode.
Note
None.

References XCanPs::IsReady, XCanPs_GetStatus(), XCANPS_MODE_CONFIG, XCANPS_MODE_LOOPBACK, XCANPS_MODE_NORMAL, XCANPS_MODE_SLEEP, XCANPS_MODE_SNOOP, XCANPS_SR_CONFIG_MASK, XCANPS_SR_NORMAL_MASK, XCANPS_SR_SLEEP_MASK, and XCANPS_SR_SNOOP_MASK.

Referenced by XCanPs_EnterMode(), XCanPs_SelfTest(), XCanPs_SetBaudRatePrescaler(), XCanPs_SetBitTiming(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

◆ XCanPs_GetRxIntrWatermark()

u8 XCanPs_GetRxIntrWatermark ( XCanPs InstancePtr)

#include <xcanps.c>

This routine gets the Rx Full threshold from the Watermark Interrupt Register.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
The Rx FIFO full watermark threshold value. The valid values are 1 to 63.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_ReadReg, XCANPS_WIR_FW_MASK, and XCANPS_WIR_OFFSET.

◆ XCanPs_GetStatus()

u32 XCanPs_GetStatus ( XCanPs InstancePtr)

#include <xcanps.c>

This function returns Status value from Status Register (SR).

Use the XCANPS_SR_* constants defined in xcanps_hw.h to interpret the returned value.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
The 32-bit value read from Status Register.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_ReadReg, and XCANPS_SR_OFFSET.

Referenced by XCanPs_GetMode().

◆ XCanPs_GetTxIntrWatermark()

u8 XCanPs_GetTxIntrWatermark ( XCanPs InstancePtr)

#include <xcanps.c>

This routine gets the Tx Empty threshold from Watermark Interrupt Register.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
The Tx Empty FIFO threshold value. The valid values are 1 to 63.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_ReadReg, XCANPS_WIR_EW_MASK, XCANPS_WIR_EW_SHIFT, and XCANPS_WIR_OFFSET.

◆ XCanPs_IntrClear()

void XCanPs_IntrClear ( XCanPs InstancePtr,
u32  Mask 
)

#include <xcanps.h>

This function clears interrupt(s).

Every bit set in Interrupt Status Register indicates that a specific type of interrupt is occurring, and this function clears one or more interrupts by writing a bit mask to Interrupt Clear Register.

Parameters
InstancePtris a pointer to the XCanPs instance.
Maskis the mask to clear. Bit positions of 1 will be cleared. Bit positions of 0 will not change the previous interrupt status. This mask is formed by OR'ing XCANPS_IXR_* bits defined in xcanps_hw.h.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ICR_OFFSET, XCanPs_IntrGetStatus(), and XCanPs_WriteReg.

Referenced by XCanPs_IntrHandler(), and XCanPs_Recv().

◆ XCanPs_IntrDisable()

void XCanPs_IntrDisable ( XCanPs InstancePtr,
u32  Mask 
)

#include <xcanps.h>

This routine disables interrupt(s).

Use the XCANPS_IXR_* constants defined in xcanps_hw.h to create the bit-mask to disable interrupt(s).

Parameters
InstancePtris a pointer to the XCanPs instance.
Maskis the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANPS_IXR_* bits defined in xcanps_hw.h.
Returns
None.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_IER_OFFSET, XCanPs_IntrGetEnabled(), and XCanPs_WriteReg.

◆ XCanPs_IntrEnable()

void XCanPs_IntrEnable ( XCanPs InstancePtr,
u32  Mask 
)

#include <xcanps.h>

This routine enables interrupt(s).

Use the XCANPS_IXR_* constants defined in xcanps_hw.h to create the bit-mask to enable interrupts.

Parameters
InstancePtris a pointer to the XCanPs instance.
Maskis the mask to enable. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANPS_IXR_* bits defined in xcanps_hw.h.
Returns
None.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_IER_OFFSET, XCanPs_IntrGetEnabled(), and XCanPs_WriteReg.

◆ XCanPs_IntrGetEnabled()

u32 XCanPs_IntrGetEnabled ( XCanPs InstancePtr)

#include <xcanps.h>

This routine returns enabled interrupt(s).

Use the XCANPS_IXR_* constants defined in xcanps_hw.h to interpret the returned value.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
Enabled interrupt(s) in a 32-bit format.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_IER_OFFSET, and XCanPs_ReadReg.

Referenced by XCanPs_IntrDisable(), XCanPs_IntrEnable(), and XCanPs_IntrHandler().

◆ XCanPs_IntrGetStatus()

u32 XCanPs_IntrGetStatus ( XCanPs InstancePtr)

#include <xcanps.h>

This routine returns interrupt status read from Interrupt Status Register.

Use the XCANPS_IXR_* constants defined in xcanps_hw.h to interpret the returned value.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
The value stored in Interrupt Status Register.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ISR_OFFSET, and XCanPs_ReadReg.

Referenced by XCanPs_IntrClear(), and XCanPs_IntrHandler().

◆ XCanPs_IntrHandler()

void XCanPs_IntrHandler ( void *  InstancePtr)

#include <xcanps.h>

This routine is the interrupt handler for the CAN driver.

This handler reads the interrupt status from the ISR, determines the source of the interrupts, calls according callbacks, and finally clears the interrupts.

Application beyond this driver is responsible for providing callbacks to handle interrupts and installing the callbacks using XCanPs_SetHandler() during initialization phase. An example delivered with this driver demonstrates how this could be done.

Parameters
InstancePtris a pointer to the XCanPs instance that just interrupted.
Returns
None.
Note
None.

References XCanPs::ErrorHandler, XCanPs::EventHandler, XCanPs::IsReady, XCanPs::RecvHandler, XCanPs::SendHandler, XCanPs_ClearBusErrorStatus(), XCanPs_GetBusErrorStatus(), XCanPs_IntrClear(), XCanPs_IntrGetEnabled(), XCanPs_IntrGetStatus(), XCANPS_IXR_ARBLST_MASK, XCANPS_IXR_BSOFF_MASK, XCANPS_IXR_ERROR_MASK, XCANPS_IXR_RXFWMFLL_MASK, XCANPS_IXR_RXNEMP_MASK, XCANPS_IXR_RXOFLW_MASK, XCANPS_IXR_RXUFLW_MASK, XCANPS_IXR_SLP_MASK, XCANPS_IXR_TXBFLL_MASK, XCANPS_IXR_TXFLL_MASK, XCANPS_IXR_TXFWMEMP_MASK, XCANPS_IXR_TXOK_MASK, and XCANPS_IXR_WKUP_MASK.

◆ XCanPs_LookupConfig()

XCanPs_Config * XCanPs_LookupConfig ( u16  DeviceId)

#include <xcanps.h>

This function looks for the device configuration based on the unique device ID.

The table XCanPs_ConfigTable[] contains the configuration information for each device in the system.

Parameters
DeviceIdis the unique device ID of the device being looked up.
Returns
A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.
Note
None.

Referenced by CanPsWatermarkIntrExample().

◆ XCanPs_Recv()

s32 XCanPs_Recv ( XCanPs InstancePtr,
u32 *  FramePtr 
)

#include <xcanps.c>

This function receives a CAN Frame.

This function first checks if RX FIFO is empty, if not, it then reads a frame from the RX FIFO into the given buffer. This function returns error code immediately if there is no frame in the RX FIFO.

Parameters
InstancePtris a pointer to the XCanPs instance.
FramePtris a pointer to a 32-bit aligned buffer where the CAN frame to be written.
Returns
  • XST_SUCCESS if RX FIFO was not empty and a frame was read from RX FIFO successfully and written into the given buffer.
  • XST_NO_DATA if there is no frame to be received from the FIFO.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_IntrClear(), XCanPs_IsRxEmpty, XCANPS_IXR_RXNEMP_MASK, XCanPs_ReadReg, XCANPS_RXFIFO_DLC_OFFSET, XCANPS_RXFIFO_DW1_OFFSET, XCANPS_RXFIFO_DW2_OFFSET, and XCANPS_RXFIFO_ID_OFFSET.

◆ XCanPs_Reset()

void XCanPs_Reset ( XCanPs InstancePtr)

#include <xcanps.c>

This function resets the CAN device.

Calling this function resets the device immediately, and any pending transmission or reception is terminated at once. Both Object Layer and Transfer Layer are reset. This function does not reset the Physical Layer. All registers are reset to the default values, and no previous status will be restored. TX FIFO, RX FIFO and TX High Priority Buffer are also reset.

When a reset is required due to an internal error, the driver notifies the upper layer software of this need through the error status code or interrupts. The upper layer software is responsible for calling this Reset function and then re-configuring the device.

The CAN device will be in Configuration Mode immediately after this function returns.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
None.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_SRR_OFFSET, XCANPS_SRR_SRST_MASK, and XCanPs_WriteReg.

Referenced by XCanPs_SelfTest().

◆ XCanPs_ResetHw()

void XCanPs_ResetHw ( u32  BaseAddr)

#include <xcanps_hw.c>

This function resets the CAN device.

Calling this function resets the device immediately, and any pending transmission or reception is terminated at once. Both Object Layer and Transfer Layer are reset. This function does not reset the Physical Layer. All registers are reset to the default values, and no previous status will be restored. TX FIFO, RX FIFO and TX High Priority Buffer are also reset.

The CAN device will be in Configuration Mode immediately after this function returns.

Parameters
BaseAddris the baseaddress of the interface.
Returns
None.
Note
None.

References XCANPS_SRR_OFFSET, XCANPS_SRR_SRST_MASK, and XCanPs_WriteReg.

◆ XCanPs_SelfTest()

s32 XCanPs_SelfTest ( XCanPs InstancePtr)

#include <xcanps.h>

This function runs a self-test on the CAN driver/device.

The test resets the device, sets up the Loop Back mode, sends a standard frame, receives the frame, verifies the contents, and resets the device again.

Note that this is a destructive test in that resets of the device are performed. Refer the device specification for the device status after the reset operation.

Parameters
InstancePtris a pointer to the XCanPs instance.
Returns
  • XST_SUCCESS if the self-test passed. i.e., the frame received via the internal loop back has the same contents as the frame sent.
    • XST_FAILURE Otherwise.
Note

If the CAN device does not work properly, this function may enter an infinite loop and will never return to the caller.

If XST_FAILURE is returned, the device is not reset so that the caller could have a chance to check reason(s) causing the failure.

References XCanPs::IsReady, XCanPs_EnterMode(), XCanPs_GetMode(), XCANPS_MODE_CONFIG, XCANPS_MODE_LOOPBACK, XCanPs_Reset(), XCanPs_SetBaudRatePrescaler(), and XCanPs_SetBitTiming().

◆ XCanPs_Send()

s32 XCanPs_Send ( XCanPs InstancePtr,
u32 *  FramePtr 
)

#include <xcanps.c>

This function sends a CAN Frame.

If the TX FIFO is not full then the given frame is written into the the TX FIFO otherwise, it returns an error code immediately. This function does not wait for the given frame being sent to CAN bus.

Parameters
InstancePtris a pointer to the XCanPs instance.
FramePtris a pointer to a 32-bit aligned buffer containing the CAN frame to be sent.
Returns
  • XST_SUCCESS if TX FIFO was not full and the given frame was written into the FIFO.
  • XST_FIFO_NO_ROOM if there is no room in the TX FIFO for the given frame.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_IsTxFifoFull, XCANPS_TXFIFO_DLC_OFFSET, XCANPS_TXFIFO_DW1_OFFSET, XCANPS_TXFIFO_DW2_OFFSET, XCANPS_TXFIFO_ID_OFFSET, and XCanPs_WriteReg.

◆ XCanPs_SendHighPriority()

s32 XCanPs_SendHighPriority ( XCanPs InstancePtr,
u32 *  FramePtr 
)

#include <xcanps.c>

This routine sends a CAN High Priority frame.

This function first checks if TX High Priority Buffer is empty. If yes, it then writes the given frame into the Buffer. If not, this function returns immediately. This function does not wait for the given frame being sent to CAN bus.

Parameters
InstancePtris a pointer to the XCanPs instance.
FramePtris a pointer to a 32-bit aligned buffer containing the CAN High Priority frame to be sent.
Returns
  • XST_SUCCESS if TX High Priority Buffer was not full and the given frame was written into the buffer.
  • XST_FIFO_NO_ROOM if there is no room in the TX High Priority Buffer for this frame.
Note

If the frame needs to be sent immediately and not delayed by processor's interrupt handling, the caller should disable interrupt at processor level before invoking this function.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_IsHighPriorityBufFull, XCANPS_TXHPB_DLC_OFFSET, XCANPS_TXHPB_DW1_OFFSET, XCANPS_TXHPB_DW2_OFFSET, XCANPS_TXHPB_ID_OFFSET, and XCanPs_WriteReg.

◆ XCanPs_SetBaudRatePrescaler()

s32 XCanPs_SetBaudRatePrescaler ( XCanPs InstancePtr,
u8  Prescaler 
)

#include <xcanps.c>

This routine sets Baud Rate Prescaler value.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Baud Rate Prescaler can be set only if the CAN device is in Configuration Mode. Call XCanPs_EnterMode() to enter Configuration Mode before using this function.

Parameters
InstancePtris a pointer to the XCanPs instance.
Prescaleris the value to set. Valid values are from 0 to 255.
Returns
  • XST_SUCCESS if the Baud Rate Prescaler value is set successfully.
  • XST_FAILURE if CAN device is not in Configuration Mode.
Note
None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_BRPR_OFFSET, XCanPs_GetMode(), XCANPS_MODE_CONFIG, and XCanPs_WriteReg.

Referenced by XCanPs_SelfTest().

◆ XCanPs_SetBitTiming()

s32 XCanPs_SetBitTiming ( XCanPs InstancePtr,
u8  SyncJumpWidth,
u8  TimeSegment2,
u8  TimeSegment1 
)

#include <xcanps.c>

This routine sets Bit time.

Time segment 1, Time segment 2 and Synchronization Jump Width are set in this function. Device specification requires the values passed into this function be one less than the actual values of these fields. Read the device specification for details.

Bit time can be set only if the CAN device is in Configuration Mode. Call XCanPs_EnterMode() to enter Configuration Mode before using this function.

Parameters
InstancePtris a pointer to the XCanPs instance.
SyncJumpWidthis the Synchronization Jump Width value to set. Valid values are from 0 to 3.
TimeSegment2is the Time Segment 2 value to set. Valid values are from 0 to 7.
TimeSegment1is the Time Segment 1 value to set. Valid values are from 0 to 15.
Returns
  • XST_SUCCESS if the Bit time is set successfully.
  • XST_FAILURE if CAN device is not in Configuration Mode.
Note
None.

References XCanPs::IsReady, XCANPS_BTR_TS1_MASK, XCanPs_GetMode(), and XCANPS_MODE_CONFIG.

Referenced by XCanPs_SelfTest().

◆ XCanPs_SetHandler()

s32 XCanPs_SetHandler ( XCanPs InstancePtr,
u32  HandlerType,
void *  CallBackFunc,
void *  CallBackRef 
)

#include <xcanps.h>

This routine installs an asynchronous callback function for the given HandlerType:

HandlerType                     Callback Function Type
----------------------- ------------------------
XCANPS_HANDLER_SEND             XCanPs_SendRecvHandler
XCANPS_HANDLER_RECV             XCanPs_SendRecvHandler
XCANPS_HANDLER_ERROR            XCanPs_ErrorHandler
XCANPS_HANDLER_EVENT            XCanPs_EventHandler
HandlerType                     Invoked by this driver when:
-------------------------------------------------------------------------
XCANPS_HANDLER_SEND             A frame transmitted by a call to
                        XCanPs_Send() has been sent successfully.
XCANPS_HANDLER_RECV             A frame(s) has been received and is sitting in
                        the RX FIFO.
XCANPS_HANDLER_ERROR            An error interrupt is occurring.
XCANPS_HANDLER_EVENT            Any other kind of interrupt is occurring.
Parameters
InstancePtris a pointer to the XCanPs instance.
HandlerTypespecifies which handler is to be attached.
CallBackFuncis the address of the callback function.
CallBackRefis a user data item that will be passed to the callback function when it is invoked.
Returns
  • XST_SUCCESS when handler is installed.
  • XST_INVALID_PARAM when HandlerType is invalid.
Note
Invoking this function for a handler that already has been installed replaces it with the new handler.

References XCanPs::ErrorHandler, XCanPs::EventHandler, XCanPs::IsReady, XCanPs::RecvHandler, XCanPs::SendHandler, XCANPS_HANDLER_ERROR, XCANPS_HANDLER_EVENT, XCANPS_HANDLER_RECV, and XCANPS_HANDLER_SEND.

◆ XCanPs_SetRxIntrWatermark()

s32 XCanPs_SetRxIntrWatermark ( XCanPs InstancePtr,
u8  Threshold 
)

#include <xcanps.c>

This routine sets the Rx Full threshold in the Watermark Interrupt Register.

Parameters
InstancePtris a pointer to the XCanPs instance.
Thresholdis the threshold to be set. The valid values are from 1 to 63.
Returns
  • XST_FAILURE - If the CAN device is not in Configuration Mode.
  • XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.
Note
The threshold can only be set when the CAN device is in the configuration mode.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_GetMode(), XCANPS_MODE_CONFIG, XCanPs_ReadReg, XCANPS_WIR_EW_MASK, XCANPS_WIR_FW_MASK, XCANPS_WIR_OFFSET, and XCanPs_WriteReg.

◆ XCanPs_SetTxIntrWatermark()

s32 XCanPs_SetTxIntrWatermark ( XCanPs InstancePtr,
u8  Threshold 
)

#include <xcanps.c>

This routine sets the Tx Empty Threshold in the Watermark Interrupt Register.

Parameters
InstancePtris a pointer to the XCanPs instance.
Thresholdis the threshold to be set. The valid values are from 1 to 63.
Returns
  • XST_FAILURE - If the CAN device is not in Configuration Mode.
  • XST_SUCCESS - If the threshold is set in Watermark Interrupt Register.
Note
The threshold can only be set when the CAN device is in the configuration mode.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_GetMode(), XCANPS_MODE_CONFIG, XCanPs_ReadReg, XCANPS_WIR_EW_MASK, XCANPS_WIR_EW_SHIFT, XCANPS_WIR_FW_MASK, XCANPS_WIR_OFFSET, and XCanPs_WriteReg.

Variable Documentation

◆ XCanPs_ConfigTable [1/2]

XCanPs_Config XCanPs_ConfigTable[XPAR_XCANPS_NUM_INSTANCES]

#include <xcanps_sinit.c>

This table contains configuration information for each CAN device in the system.

◆ XCanPs_ConfigTable [2/2]

XCanPs_Config XCanPs_ConfigTable[XPAR_XCANPS_NUM_INSTANCES]

#include <xcanps_g.c>

Initial value:
= {
{
(u16)XPAR_XCANPS_0_DEVICE_ID,
(u32)XPAR_XCANPS_0_BASEADDR
},
}

This table contains configuration information for each CAN device in the system.