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deinterlacer
Xilinx SDK Drivers API Documentation
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Macros | |
#define | XDEINT_HW_H |
Prevent circular inclusions by using protection macros. More... | |
#define | XDEINT_RESET_RESET_MASK 0x00000001 |
Software Reset. More... | |
#define | XDEINT_FADE_RATIO 1048576 |
Fade ratio. More... | |
Register Offsets: | |
#define | XDEINT_CONTROL_OFFSET 0x000 |
Deinterlacer Main Control. More... | |
#define | XDEINT_MODE_OFFSET 0x004 |
Deinterlacer internal Modes. More... | |
#define | XDEINT_IER_OFFSET 0x008 |
Interrupt Enable Control. More... | |
#define | XDEINT_ISR_OFFSET 0x00C |
Interrupt Enable Status. More... | |
#define | XDEINT_HEIGHT_OFFSET 0x010 |
Height. More... | |
#define | XDEINT_WIDTH_OFFSET 0x014 |
Width. More... | |
#define | XDEINT_THRESH1_OFFSET 0x018 |
T1 Threshold. More... | |
#define | XDEINT_THRESH2_OFFSET 0x01C |
T2 Threshold. More... | |
#define | XDEINT_XFADE_OFFSET 0x020 |
Cross Fade Ration. More... | |
#define | XDEINT_BUFFER0_OFFSET 0x024 |
VFBC Field Buffer 0 Base. More... | |
#define | XDEINT_BUFFER1_OFFSET 0x028 |
VFBC Field Buffer 1 Base. More... | |
#define | XDEINT_BUFFER2_OFFSET 0x02C |
VFBC Field Buffer 2 Base. More... | |
#define | XDEINT_BUFSIZE_OFFSET 0x030 |
VFBC Field Buffer Page size in 32bit Words. More... | |
#define | XDEINT_VER_OFFSET 0x0F0 |
Hardware Version ID. More... | |
#define | XDEINT_RESET_OFFSET 0x100 |
Soft Reset. More... | |
Interrupt Status/Enable Register bit definitions: | |
#define | XDEINT_IXR_UPDATE_MASK 0x00000001 |
Internal Register update done. More... | |
#define | XDEINT_IXR_LOCKED_MASK 0x00000002 |
Deinterlacer is locked to incoming video. More... | |
#define | XDEINT_IXR_UNLOCKED_MASK 0x00000004 |
Deinterlacer has lost lock to incoming video. More... | |
#define | XDEINT_IXR_ERROR_MASK 0x00000008 |
Deinterlacer internal FIFO error. More... | |
#define | XDEINT_IXR_PULL_ON_MASK 0x00000010 |
Pull down activated. More... | |
#define | XDEINT_IXR_PULL_OFF_MASK 0x00000020 |
Pull down cancelled. More... | |
#define | XDEINT_IXR_FRAME_MASK 0x00000040 |
Frame Tick. More... | |
#define | XDEINT_IXR_FS_CFG_ERROR_MASK 0x00000100 |
Frame store Write setup error. More... | |
#define | XDEINT_IXR_FS_WR_ERROR_MASK 0x00000200 |
Frame store Write FIFO overflow. More... | |
#define | XDEINT_IXR_FS_RD_FIELD_ERROR_MASK 0x00000400 |
Frame store Read Field under run. More... | |
#define | XDEINT_IXR_FS_RD_FRAME_ERROR_MASK 0x00000800 |
Frame store Read Frame under run. More... | |
#define | XDEINT_IXR_ALLINTR_MASK |
Mask for all interrupts. More... | |
Error Status/ bit definitions: | |
#define | XDEINT_STS_ERROR 0x00000008 |
Deinterlacer internal FIFO error. More... | |
#define | XDEINT_STS_FS_CFG_ERROR 0x00000100 |
Frame store Write setup error. More... | |
#define | XDEINT_STS_FS_WR_ERROR 0x00000200 |
Frame store Write FIFO overflow. More... | |
#define | XDEINT_STS_FS_RD_FIELD_ERROR 0x00000400 |
Frame store Read Field under run. More... | |
#define | XDEINT_STS_FS_RD_FRAME_ERROR 0x00000800 |
Frame store Read Frame under run. More... | |
Deinterlacer Control Fields: | |
#define | XDEINT_VER_MAJOR_MASK 0xFF000000 |
Major Version. More... | |
#define | XDEINT_VER_MAJOR_SHIFT 24 |
Major Bit Shift. More... | |
#define | XDEINT_VER_MINOR_MASK 0x00F00000 |
Minor Version. More... | |
#define | XDEINT_VER_MINOR_SHIFT 20 |
Minor Bit Shift. More... | |
#define | XDEINT_VER_REV_MASK 0x000F0000 |
Revision Version. More... | |
#define | XDEINT_VER_REV_SHIFT 16 |
Revision Bit Shift. More... | |
#define | XDEINT_CTL_UPDATE_REQ 0x00000001 |
Queue a register update request. More... | |
#define | XDEINT_CTL_ENABLE 0x00000002 |
Enable/Disable Deinterlacer algorithms. More... | |
#define | XDEINT_CTL_ACCEPT_VIDEO 0x00000004 |
Accept Video into the Deinterlacer. More... | |
Deinterlacer Mode Fields: | |
#define | XDEINT_MODE_ALGORITHM_0 0x00000001 |
Deinterlacer algorithm. More... | |
#define | XDEINT_MODE_ALGORITHM_1 0x00000002 |
Deinterlacer algorithm. More... | |
#define | XDEINT_MODE_COL 0x00000004 |
Color Space. More... | |
#define | XDEINT_MODE_PACKING_0 0x00000008 |
XSVI Packing. More... | |
#define | XDEINT_MODE_PACKING_1 0x00000010 |
XSVI Packing. More... | |
#define | XDEINT_MODE_FIELD_ORDER 0x00000020 |
First field order. More... | |
#define | XDEINT_MODE_PSF_ENABLE 0x00000040 |
PSF pass through enable. More... | |
#define | XDEINT_MODE_PULL_32_ENABLE 0x00000080 |
Pull down 3:2 control enable. More... | |
#define | XDEINT_MODE_PULL_22_ENABLE 0x00000100 |
Pull down 2:2 control enable. More... | |
#define | XDEINT_MODE_PULL_22_FIELDP 0x00000200 |
Pull down 2:2 Field Precedence. More... | |
#define | XDEINT_MODE_COLOUR_YUV 0x00000000 |
Deinterlacer color space. More... | |
#define | XDEINT_MODE_COLOUR_RGB 0x00000004 |
Deinterlacer color space. More... | |
#define | XDEINT_MODE_ALGORITHM_RAW 0x00000000 |
Deinterlacer algorithm option 0. More... | |
#define | XDEINT_MODE_ALGORITHM_DIAG 0x00000001 |
Deinterlacer algorithm option 1. More... | |
#define | XDEINT_MODE_ALGORITHM_MOTION 0x00000002 |
Deinterlacer algorithm option 2. More... | |
#define | XDEINT_MODE_ALGORITHM_FULL 0x00000003 |
Deinterlacer algorithm option 3. More... | |
#define | XDEINT_MODE_PACKING_420 0x00000000 |
XSVI Packing mode 420. More... | |
#define | XDEINT_MODE_PACKING_422 0x00000008 |
XSVI Packing mode 422. More... | |
#define | XDEINT_MODE_PACKING_444 0x00000010 |
XSVI Packing mode 444. More... | |
#define | XDEINT_MODE_FIELD_EVEN_FIRST 0x00000020 |
First field of frame contains even video lines. More... | |
#define | XDEINT_MODE_FIELD_ODD_FIRST 0x00000000 |
First field of frame contains odd video lines. More... | |
#define | XDEINT_MODE_ALGORITHM_MASK 0x00000003 |
Deinterlacer algorithm. More... | |
#define | XDEINT_MODE_COL_MASK 0x00000004 |
Color Space. More... | |
#define | XDEINT_MODE_PACKING_MASK 0x00000018 |
XSVI Packing. More... | |
#define | XDEINT_MODE_FIELD_ORDER_MASK 0x00000020 |
First field order. More... | |
#define | XDEINT_MODE_PSF_ENABLE_MASK 0x00000040 |
PSF pass through enable. More... | |
#define | XDEINT_MODE_PULL_ENABLE_MASK 0x00000180 |
Pull down control enable. More... | |
Deinterlacer height bit definitions: | |
#define | XDEINT_HEIGHT_MASK 0x000007FF |
Deinterlacer height. More... | |
Deinterlacer width bit definitions: | |
#define | XDEINT_WIDTH_MASK 0x000007FF |
Deinterlacer width. More... | |
Deinterlacer Threshold T1 /T2 bit definitions: | |
#define | XDEINT_THRESHOLD_MASK 0x000003FF |
Deinterlacer threshold. More... | |
Deinterlacer cross fade cycle bit definitions: | |
#define | XDEINT_XFADE_MASK 0x0000FFFF |
Deinterlacer Cross fade cycle. More... | |
Deinterlacer Buffer cycle bit definitions: | |
#define | XDEINT_BUF_SIZE_MASK 0x00FFFFFF |
Deinterlacer Buffer size mask. More... | |
Backward compatibility macros | |
#define | XDEINT_CONTROL XDEINT_CONTROL_OFFSET |
#define | XDEINT_MODE XDEINT_MODE_OFFSET |
#define | XDEINT_IER XDEINT_IER_OFFSET |
#define | XDEINT_ISR XDEINT_ISR_OFFSET |
#define | XDEINT_HEIGHT XDEINT_HEIGHT_OFFSET |
#define | XDEINT_WIDTH XDEINT_WIDTH_OFFSET |
#define | XDEINT_T1 XDEINT_THRESH1_OFFSET |
#define | XDEINT_T2 XDEINT_THRESH2_OFFSET |
#define | XDEINT_XFADE XDEINT_XFADE_OFFSET |
#define | XDEINT_FS_BASE0 XDEINT_BUFFER0_OFFSET |
#define | XDEINT_FS_BASE1 XDEINT_BUFFER1_OFFSET |
#define | XDEINT_FS_BASE2 XDEINT_BUFFER2_OFFSET |
#define | XDEINT_FS_WORDS XDEINT_BUFSIZE_OFFSET |
#define | XDEINT_VER XDEINT_VER_OFFSET |
#define | XDEINT_RESET XDEINT_RESET_OFFSET |
Core register I/O APIs: | |
#define | XDeint_In32 Xil_In32 |
#define | XDeint_Out32 Xil_Out32 |
#define | XDeint_ReadReg(BaseAddress, RegOffset) XDeint_In32((BaseAddress) + (u32)(RegOffset)) |
This macro reads the given register. More... | |
#define | XDeint_WriteReg(BaseAddress, RegOffset, Data) XDeint_Out32((BaseAddress) + (u32)(RegOffset), (Data)) |
This macro writes the given register. More... | |