vphy
Xilinx SDK Drivers API Documentation
XVphy_Config Struct Reference

This typedef contains configuration information for the Video PHY core. More...

Data Fields

u16 DeviceId
 Device instance ID. More...
 
UINTPTR BaseAddr
 The base address of the core instance. More...
 
XVphy_GtType XcvrType
 VPHY Transceiver Type. More...
 
u8 TxChannels
 No. More...
 
u8 RxChannels
 No. More...
 
XVphy_ProtocolType TxProtocol
 Protocol which TX is used for. More...
 
XVphy_ProtocolType RxProtocol
 Protocol which RX is used for. More...
 
XVphy_PllRefClkSelType TxRefClkSel
 TX REFCLK selection. More...
 
XVphy_PllRefClkSelType RxRefClkSel
 RX REFCLK selection. More...
 
XVphy_SysClkDataSelType TxSysPllClkSel
 TX SYSCLK selection. More...
 
XVphy_SysClkDataSelType RxSysPllClkSel
 RX SYSCLK selectino. More...
 
u8 DruIsPresent
 A data recovery unit (DRU) exists in the design . More...
 
XVphy_PllRefClkSelType DruRefClkSel
 DRU REFCLK selection. More...
 
XVidC_PixelsPerClock Ppc
 Number of input pixels per clock. More...
 
u8 TxBufferBypass
 TX Buffer Bypass is enabled in the design. More...
 
u8 HdmiFastSwitch
 HDMI fast switching is enabled in the design. More...
 
u8 TransceiverWidth
 Transceiver Width seeting in the design. More...
 
u32 ErrIrq
 Error IRQ is enalbed in design. More...
 
u32 AxiLiteClkFreq
 AXI Lite Clock Frequency in Hz. More...
 
u32 DrpClkFreq
 DRP Clock Frequency in Hz. More...
 

Detailed Description

This typedef contains configuration information for the Video PHY core.

Field Documentation

◆ AxiLiteClkFreq

u32 XVphy_Config::AxiLiteClkFreq

AXI Lite Clock Frequency in Hz.

◆ BaseAddr

◆ DeviceId

u16 XVphy_Config::DeviceId

Device instance ID.

◆ DrpClkFreq

u32 XVphy_Config::DrpClkFreq

DRP Clock Frequency in Hz.

◆ DruIsPresent

u8 XVphy_Config::DruIsPresent

A data recovery unit (DRU) exists in the design .

◆ DruRefClkSel

XVphy_PllRefClkSelType XVphy_Config::DruRefClkSel

DRU REFCLK selection.

◆ ErrIrq

u32 XVphy_Config::ErrIrq

Error IRQ is enalbed in design.

◆ HdmiFastSwitch

u8 XVphy_Config::HdmiFastSwitch

HDMI fast switching is enabled in the design.

◆ Ppc

XVidC_PixelsPerClock XVphy_Config::Ppc

Number of input pixels per clock.

◆ RxChannels

u8 XVphy_Config::RxChannels

No.

of active channels in RX

◆ RxProtocol

XVphy_ProtocolType XVphy_Config::RxProtocol

Protocol which RX is used for.

◆ RxRefClkSel

XVphy_PllRefClkSelType XVphy_Config::RxRefClkSel

RX REFCLK selection.

◆ RxSysPllClkSel

XVphy_SysClkDataSelType XVphy_Config::RxSysPllClkSel

RX SYSCLK selectino.

◆ TransceiverWidth

u8 XVphy_Config::TransceiverWidth

Transceiver Width seeting in the design.

◆ TxBufferBypass

u8 XVphy_Config::TxBufferBypass

TX Buffer Bypass is enabled in the design.

◆ TxChannels

u8 XVphy_Config::TxChannels

No.

of active channels in TX

◆ TxProtocol

XVphy_ProtocolType XVphy_Config::TxProtocol

Protocol which TX is used for.

Referenced by XVphy_RegisterDebug().

◆ TxRefClkSel

XVphy_PllRefClkSelType XVphy_Config::TxRefClkSel

TX REFCLK selection.

◆ TxSysPllClkSel

XVphy_SysClkDataSelType XVphy_Config::TxSysPllClkSel

TX SYSCLK selection.

◆ XcvrType

XVphy_GtType XVphy_Config::XcvrType

VPHY Transceiver Type.

Referenced by XVphy_DirReconfig(), XVphy_PllInitialize(), and XVphy_WriteCfgRefClkSelReg().