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ipipsu
Xilinx SDK Drivers API Documentation
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This is the header file for implementation of IPIPSU driver. Inter Processor Interrupt (IPI) is used for communication between different processors on ZynqMP SoC. Each IPI register set has Trigger, Status and Observation registers for communication between processors. Each IPI path has a 32 byte buffer associated with it and these buffers are located in the XPPU RAM. This driver supports the following operations:
Initialization The config data for the driver is loaded and is based on the HW build. The XIpiPsu_Config data structure contains all the data related to the IPI driver instance and also teh available Target CPUs.
Sending an IPI The following steps can be followed to send an IPI:
Receiving an IPI To receive an IPI, the following sequence can be followed:
MODIFICATION HISTORY:
Ver Who Date Changes
2.2 ms 01/23/17 Modified xil_printf statement in main function for all examples to ensure that "Successfully ran" and "Failed" strings are available in all examples. This is a fix for CR-965028. kvn 02/17/17 Add support for updating ConfigTable at run time ms 03/17/17 Added readme.txt file in examples folder for doxygen generation. 2.3 ms 04/11/17 Modified tcl file to add suffix U for all macro definitions of ipipsu in xparameters.h