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ccm
Xilinx SDK Drivers API Documentation
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Macros | |
#define | XCCM_HW_H_ |
Prevent circular inclusions by using protection macros. More... | |
#define | XCcm_In32 Xil_In32 |
Input operation. More... | |
#define | XCcm_Out32 Xil_Out32 |
Output operation. More... | |
#define | XCcm_ReadReg(BaseAddress, RegOffset) XCcm_In32((BaseAddress) + (u32)(RegOffset)) |
This macro reads the given register. More... | |
#define | XCcm_WriteReg(BaseAddress, RegOffset, Data) XCcm_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data)) |
This macro writes the given register. More... | |
Registers offsets | |
#define | XCCM_CONTROL_OFFSET 0x000 |
Control offset. More... | |
#define | XCCM_STATUS_OFFSET 0x004 |
Status offset. More... | |
#define | XCCM_ERROR_OFFSET 0x008 |
Error offset. More... | |
#define | XCCM_IRQ_EN_OFFSET 0x00C |
IRQ Enable offset. More... | |
#define | XCCM_VERSION_OFFSET 0x010 |
Version offset. More... | |
#define | XCCM_SYSDEBUG0_OFFSET 0x014 |
System Debug 0 offset. More... | |
#define | XCCM_SYSDEBUG1_OFFSET 0x018 |
System Debug 1 offset. More... | |
#define | XCCM_SYSDEBUG2_OFFSET 0x01C |
System Debug 2 offset. More... | |
#define | XCCM_ACTIVE_SIZE_OFFSET 0x020 |
Active Size (V x H) offset. More... | |
#define | XCCM_K11_OFFSET 0x100 |
K11 Coefficient offset. More... | |
#define | XCCM_K12_OFFSET 0x104 |
K12 Coefficient offset. More... | |
#define | XCCM_K13_OFFSET 0x108 |
K13 Coefficient offset. More... | |
#define | XCCM_K21_OFFSET 0x10C |
K21 Coefficient offset. More... | |
#define | XCCM_K22_OFFSET 0x110 |
K22 Coefficient offset. More... | |
#define | XCCM_K23_OFFSET 0x114 |
K23 Coefficient offset. More... | |
#define | XCCM_K31_OFFSET 0x118 |
K31 Coefficient offset. More... | |
#define | XCCM_K32_OFFSET 0x11C |
K32 Coefficient offset. More... | |
#define | XCCM_K33_OFFSET 0x120 |
K33 Coefficient offset. More... | |
#define | XCCM_ROFFSET_OFFSET 0x124 |
Red Offset offset. More... | |
#define | XCCM_GOFFSET_OFFSET 0x128 |
Green Offset offset. More... | |
#define | XCCM_BOFFSET_OFFSET 0x12C |
Blue Offset offset. More... | |
#define | XCCM_CLIP_OFFSET 0x130 |
Clip Offset offset. More... | |
#define | XCCM_CLAMP_OFFSET 0x134 |
Clamp Offset offset. More... | |
Control register bit masks | |
#define | XCCM_CTL_SW_EN_MASK 0x00000001 |
Enable mask. More... | |
#define | XCCM_CTL_RUE_MASK 0x00000002 |
Register Update Enable mask. More... | |
#define | XCCM_CTL_BPE_MASK 0x00000010 |
Bypass Enable mask. More... | |
#define | XCCM_CTL_TPE_MASK 0x00000020 |
Test Pattern Enable mask. More... | |
#define | XCCM_CTL_AUTORESET_MASK 0x40000000 |
Software Auto Reset mask. More... | |
#define | XCCM_CTL_RESET_MASK 0x80000000 |
Software Reset mask. More... | |
Interrupt register bit masks. It is applicable for | |
Status and IRQ_ENABLE Registers | |
#define | XCCM_IXR_PROCS_STARTED_MASK 0x00000001 |
Process Started mask. More... | |
#define | XCCM_IXR_EOF_MASK 0x00000002 |
End-Of-Frame mask. More... | |
#define | XCCM_IXR_SE_MASK 0x00010000 |
Slave Error mask. More... | |
#define | XCCM_IXR_ALLINTR_MASK 0x00010003 |
Interrupt all error mask (ORing of all interrupt mask) More... | |
Error register bit masks | |
#define | XCCM_ERR_EOL_EARLY_MASK 0x00000001 |
End of Line Early mask. More... | |
#define | XCCM_ERR_EOL_LATE_MASK 0x00000002 |
End of Line Late mask. More... | |
#define | XCCM_ERR_SOF_EARLY_MASK 0x00000004 |
Start of Frame Early mask. More... | |
#define | XCCM_ERR_SOF_LATE_MASK 0x00000008 |
Start of Frame Late mask. More... | |
Version register bit masks and shifts | |
#define | XCCM_VER_REV_NUM_MASK 0x000000FF |
Version Revision Number mask. More... | |
#define | XCCM_VER_PID_MASK 0x00000F00 |
Version Patch ID mask. More... | |
#define | XCCM_VER_REV_MASK 0x0000F000 |
Version Revision mask. More... | |
#define | XCCM_VER_MINOR_MASK 0x00FF0000 |
Version Minor mask. More... | |
#define | XCCM_VER_MAJOR_MASK 0xFF000000 |
Version Major mask. More... | |
#define | XCCM_VER_INTERNAL_SHIFT 0x00000008 |
Version Internal shift. More... | |
#define | XCCM_VER_REV_SHIFT 0x0000000C |
Version Revision shift. More... | |
#define | XCCM_VER_MINOR_SHIFT 0x00000010 |
Version Minor shift. More... | |
#define | XCCM_VER_MAJOR_SHIFT 0x00000018 |
Version Major shift. More... | |
Active Size register masks and shift | |
#define | XCCM_ACTSIZE_NUM_PIXEL_MASK 0x00001FFF |
Number of Active pixels per scan line (horizontal) mask. More... | |
#define | XCCM_ACTSIZE_NUM_LINE_MASK 0x1FFF0000 |
Number of Active lines per frame (vertical) mask. More... | |
#define | XCCM_ACTSIZE_NUM_LINE_SHIFT 16 |
Shift for number of lines. More... | |
Matrix coefficient masks and shifts | |
#define | XCCM_COEF_MASK 0x0003FFFF |
Matrix Coefficient mask. More... | |
#define | XCCM_COEF_DECI_MASK 0x0001C000 |
Mask of Decimal part. More... | |
#define | XCCM_COEFF_FRAC_MASK 0x00003FFF |
Mask of Fractional part. More... | |
#define | XCCM_COEF_SHIFT 14 |
Coefficient shift. More... | |
#define | XCCM_COEF_SIGN_MASK 0x20000 |
Mask for sign bit. More... | |
Offsets masks and shifts | |
#define | XCCM_OFFSET_MASK 0x0001FFFF |
Offset mask for Red, Green Blue Offset registers. More... | |
#define | XCCM_OFFSET_SIGN_SHIFT 15 |
Shift for signed bit. More... | |
Clip and Clamp masks | |
#define | XCCM_CLIP_MASK 0x0000FFFF |
Clip register mask. More... | |
#define | XCCM_CLAMP_MASK 0x0000FFFF |
Clamp register mask. More... | |
General purpose macros | |
#define | XCCM_SIGN_MUL -1 |
Macro for sign multiplication. More... | |
#define | XCCM_MAX_VALUE 0xFFFFFFFF |
32 bit maximum value More... | |
#define | XCCM_SIGNBIT_MASK |
Macros for backward compatibility | |
#define | CCM_CONTROL XCCM_CONTROL_OFFSET |
#define | CCM_STATUS XCCM_STATUS_OFFSET |
#define | CCM_ERROR XCCM_ERROR_OFFSET |
#define | CCM_IRQ_EN XCCM_IRQ_EN_OFFSET |
#define | CCM_VERSION XCCM_VERSION_OFFSET |
#define | CCM_SYSDEBUG0 XCCM_SYSDEBUG0_OFFSET |
#define | CCM_SYSDEBUG1 XCCM_SYSDEBUG1_OFFSET |
#define | CCM_SYSDEBUG2 XCCM_SYSDEBUG2_OFFSET |
#define | CCM_ACTIVE_SIZE XCCM_ACTIVE_SIZE_OFFSET |
#define | CCM_K11 XCCM_K11_OFFSET |
#define | CCM_K12 XCCM_K12_OFFSET |
#define | CCM_K13 XCCM_K13_OFFSET |
#define | CCM_K21 XCCM_K21_OFFSET |
#define | CCM_K22 XCCM_K22_OFFSET |
#define | CCM_K23 XCCM_K23_OFFSET |
#define | CCM_K31 XCCM_K31_OFFSET |
#define | CCM_K32 XCCM_K32_OFFSET |
#define | CCM_K33 XCCM_K33_OFFSET |
#define | CCM_ROFFSET XCCM_ROFFSET_OFFSET |
#define | CCM_GOFFSET XCCM_GOFFSET_OFFSET |
#define | CCM_BOFFSET XCCM_BOFFSET_OFFSET |
#define | CCM_CLIP XCCM_CLIP_OFFSET |
#define | CCM_CLAMP XCCM_CLAMP_OFFSET |
#define | CCM_CTL_EN_MASK XCCM_CTL_SW_EN_MASK |
#define | CCM_CTL_RUE_MASK XCCM_CTL_RUE_MASK |
#define | CCM_RST_RESET XCCM_CTL_RESET_MASK |
#define | CCM_RST_AUTORESET XCCM_CTL_AUTORESET_MASK |
#define | CCM_In32 XCcm_In32 |
#define | CCM_Out32 XCcm_Out32 |
#define | XCCM_ReadReg XCcm_ReadReg |
#define | XCCM_WriteReg XCcm_WriteReg |
Interrupt Enable and Status Registers Offsets | |
#define | XCCM_ISR_OFFSET XCCM_STATUS_OFFSET |
Interrupt status register generates a interrupt if the corresponding bits of interrupt enable register bits are set. More... | |
#define | XCCM_IER_OFFSET XCCM_IRQ_EN_OFFSET |
Interrupt enable Offset. More... | |