sysmonpsu
Xilinx SDK Drivers API Documentation
xsysmonpsu_hw.h File Reference

Overview

This header file contains the identifiers and basic driver functions (or macros) that can be used to access the device.

Other driver functions are defined in xsysmonpsu.h.

MODIFICATION HISTORY:
Ver   Who    Date       Changes

1.0 kvn 12/15/15 First release 2.0 vns 08/14/16 Added CFG_REG3, SEQ_INPUT_MODE2, SEQ_ACQ2, SEQ_CH2 and SEQ_AVG2 offsets and bit masks 2.1 sk 03/03/16 Check for PL reset before doing PL Sysmon reset.
 

Macros

#define XSYSMONPSU_BASEADDR   0xFFA50000U
 XSysmonPsu Base Address. More...
 
#define XSYSMONPSU_MISC_OFFSET   0x00000000U
 Register: XSysmonPsuMisc. More...
 
#define XSYSMONPSU_ISR_0_OFFSET   0x00000010U
 Register: XSysmonPsuIsr0. More...
 
#define XSYSMONPSU_ISR_1_OFFSET   0x00000014U
 Register: XSysmonPsuIsr1. More...
 
#define XSYSMONPSU_IMR_0_OFFSET   0x00000018U
 Register: XSysmonPsuImr0. More...
 
#define XSYSMONPSU_IMR_1_OFFSET   0x0000001CU
 Register: XSysmonPsuImr1. More...
 
#define XSYSMONPSU_IER_0_OFFSET   0x00000020U
 Register: XSysmonPsuIer0. More...
 
#define XSYSMONPSU_IER_1_OFFSET   0x00000024U
 Register: XSysmonPsuIer1. More...
 
#define XSYSMONPSU_IDR_0_OFFSET   0x00000028U
 Register: XSysmonPsuIdr0. More...
 
#define XSYSMONPSU_IDR_1_OFFSET   0x0000002CU
 Register: XSysmonPsuIdr1. More...
 
#define XSYSMONPSU_PS_SYSMON_CSTS_OFFSET   0x00000040U
 Register: XSysmonPsuPsSysmonSts. More...
 
#define XSYSMONPSU_PL_SYSMON_CSTS_OFFSET   0x00000044U
 Register: XSysmonPsuPlSysmonSts. More...
 
#define XSYSMONPSU_MON_STS_OFFSET   0x00000050U
 Register: XSysmonPsuMonSts. More...
 
#define XSYSMONPSU_VCC_PSPLL0_OFFSET   0x00000060U
 Register: XSysmonPsuVccPspll0. More...
 
#define XSYSMONPSU_VCC_PSPLL1_OFFSET   0x00000064U
 Register: XSysmonPsuVccPspll1. More...
 
#define XSYSMONPSU_VCC_PSPLL2_OFFSET   0x00000068U
 Register: XSysmonPsuVccPspll2. More...
 
#define XSYSMONPSU_VCC_PSPLL3_OFFSET   0x0000006CU
 Register: XSysmonPsuVccPspll3. More...
 
#define XSYSMONPSU_VCC_PSPLL4_OFFSET   0x00000070U
 Register: XSysmonPsuVccPspll4. More...
 
#define XSYSMONPSU_VCC_PSBATT_OFFSET   0x00000074U
 Register: XSysmonPsuVccPsbatt. More...
 
#define XSYSMONPSU_VCCINT_OFFSET   0x00000078U
 Register: XSysmonPsuVccint. More...
 
#define XSYSMONPSU_VCCBRAM_OFFSET   0x0000007CU
 Register: XSysmonPsuVccbram. More...
 
#define XSYSMONPSU_VCCAUX_OFFSET   0x00000080U
 Register: XSysmonPsuVccaux. More...
 
#define XSYSMONPSU_VCC_PSDDRPLL_OFFSET   0x00000084U
 Register: XSysmonPsuVccPsddrpll. More...
 
#define XSYSMONPSU_DDRPHY_VREF_OFFSET   0x00000088U
 Register: XSysmonPsuDdrphyVref. More...
 
#define XSYSMONPSU_DDRPHY_ATO_OFFSET   0x0000008CU
 Register: XSysmonPsuDdrphyAto. More...
 
#define XSYSMONPSU_PSGT_AT0_OFFSET   0x00000090U
 Register: XSysmonPsuPsgtAt0. More...
 
#define XSYSMONPSU_PSGT_AT1_OFFSET   0x00000094U
 Register: XSysmonPsuPsgtAt1. More...
 
#define XSYSMONPSU_RESERVE0_OFFSET   0x00000098U
 Register: XSysmonPsuReserve0. More...
 
#define XSYSMONPSU_RESERVE1_OFFSET   0x0000009CU
 Register: XSysmonPsuReserve1. More...
 
#define XSYSMONPSU_TEMP_OFFSET   0x00000000U
 Register: XSysmonPsuTemp. More...
 
#define XSYSMONPSU_SUP1_OFFSET   0x00000004U
 Register: XSysmonPsuSup1. More...
 
#define XSYSMONPSU_SUP2_OFFSET   0x00000008U
 Register: XSysmonPsuSup2. More...
 
#define XSYSMONPSU_VP_VN_OFFSET   0x0000000CU
 Register: XSysmonPsuVpVn. More...
 
#define XSYSMONPSU_VREFP_OFFSET   0x00000010U
 Register: XSysmonPsuVrefp. More...
 
#define XSYSMONPSU_VREFN_OFFSET   0x00000014U
 Register: XSysmonPsuVrefn. More...
 
#define XSYSMONPSU_SUP3_OFFSET   0x00000018U
 Register: XSysmonPsuSup3. More...
 
#define XSYSMONPSU_CAL_SUP_OFF_OFFSET   0x00000020U
 Register: XSysmonPsuCalSupOff. More...
 
#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_OFFSET   0x00000024U
 Register: XSysmonPsuCalAdcBiplrOff. More...
 
#define XSYSMONPSU_CAL_GAIN_ERR_OFFSET   0x00000028U
 Register: XSysmonPsuCalGainErr. More...
 
#define XSYSMONPSU_SUP4_OFFSET   0x00000034U
 Register: XSysmonPsuSup4. More...
 
#define XSYSMONPSU_SUP5_OFFSET   0x00000038U
 Register: XSysmonPsuSup5. More...
 
#define XSYSMONPSU_SUP6_OFFSET   0x0000003CU
 Register: XSysmonPsuSup6. More...
 
#define XSYSMONPSU_VAUX00_OFFSET   0x00000040U
 Register: XSysmonPsuVaux00. More...
 
#define XSYSMONPSU_VAUX01_OFFSET   0x00000044U
 Register: XSysmonPsuVaux01. More...
 
#define XSYSMONPSU_VAUX02_OFFSET   0x00000048U
 Register: XSysmonPsuVaux02. More...
 
#define XSYSMONPSU_VAUX03_OFFSET   0x0000004CU
 Register: XSysmonPsuVaux03. More...
 
#define XSYSMONPSU_VAUX04_OFFSET   0x00000050U
 Register: XSysmonPsuVaux04. More...
 
#define XSYSMONPSU_VAUX05_OFFSET   0x00000054U
 Register: XSysmonPsuVaux05. More...
 
#define XSYSMONPSU_VAUX06_OFFSET   0x00000058U
 Register: XSysmonPsuVaux06. More...
 
#define XSYSMONPSU_VAUX07_OFFSET   0x0000005CU
 Register: XSysmonPsuVaux07. More...
 
#define XSYSMONPSU_VAUX08_OFFSET   0x00000060U
 Register: XSysmonPsuVaux08. More...
 
#define XSYSMONPSU_VAUX09_OFFSET   0x00000064U
 Register: XSysmonPsuVaux09. More...
 
#define XSYSMONPSU_VAUX0A_OFFSET   0x00000068U
 Register: XSysmonPsuVaux0a. More...
 
#define XSYSMONPSU_VAUX0B_OFFSET   0x0000006CU
 Register: XSysmonPsuVaux0b. More...
 
#define XSYSMONPSU_VAUX0C_OFFSET   0x00000070U
 Register: XSysmonPsuVaux0c. More...
 
#define XSYSMONPSU_VAUX0D_OFFSET   0x00000074U
 Register: XSysmonPsuVaux0d. More...
 
#define XSYSMONPSU_VAUX0E_OFFSET   0x00000078U
 Register: XSysmonPsuVaux0e. More...
 
#define XSYSMONPSU_VAUX0F_OFFSET   0x0000007CU
 Register: XSysmonPsuVaux0f. More...
 
#define XSYSMONPSU_MAX_TEMP_OFFSET   0x00000080U
 Register: XSysmonPsuMaxTemp. More...
 
#define XSYSMONPSU_MAX_SUP1_OFFSET   0x00000084U
 Register: XSysmonPsuMaxSup1. More...
 
#define XSYSMONPSU_MAX_SUP2_OFFSET   0x00000088U
 Register: XSysmonPsuMaxSup2. More...
 
#define XSYSMONPSU_MAX_SUP3_OFFSET   0x0000008CU
 Register: XSysmonPsuMaxSup3. More...
 
#define XSYSMONPSU_MIN_TEMP_OFFSET   0x00000090U
 Register: XSysmonPsuMinTemp. More...
 
#define XSYSMONPSU_MIN_SUP1_OFFSET   0x00000094U
 Register: XSysmonPsuMinSup1. More...
 
#define XSYSMONPSU_MIN_SUP2_OFFSET   0x00000098U
 Register: XSysmonPsuMinSup2. More...
 
#define XSYSMONPSU_MIN_SUP3_OFFSET   0x0000009CU
 Register: XSysmonPsuMinSup3. More...
 
#define XSYSMONPSU_MAX_SUP4_OFFSET   0x000000A0U
 Register: XSysmonPsuMaxSup4. More...
 
#define XSYSMONPSU_MAX_SUP5_OFFSET   0x000000A4U
 Register: XSysmonPsuMaxSup5. More...
 
#define XSYSMONPSU_MAX_SUP6_OFFSET   0x000000A8U
 Register: XSysmonPsuMaxSup6. More...
 
#define XSYSMONPSU_MIN_SUP4_OFFSET   0x000000B0U
 Register: XSysmonPsuMinSup4. More...
 
#define XSYSMONPSU_MIN_SUP5_OFFSET   0x000000B4U
 Register: XSysmonPsuMinSup5. More...
 
#define XSYSMONPSU_MIN_SUP6_OFFSET   0x000000B8U
 Register: XSysmonPsuMinSup6. More...
 
#define XSYSMONPSU_STS_FLAG_OFFSET   0x000000FCU
 Register: XSysmonPsuStsFlag. More...
 
#define XSYSMONPSU_CFG_REG0_OFFSET   0x00000100U
 Register: XSysmonPsuCfgReg0. More...
 
#define XSYSMONPSU_CFG_REG1_OFFSET   0x00000104U
 Register: XSysmonPsuCfgReg1. More...
 
#define XSYSMONPSU_CFG_REG2_OFFSET   0x00000108U
 Register: XSysmonPsuCfgReg2. More...
 
#define XSYSMONPSU_SEQ_CH0_OFFSET   0x00000120U
 Register: XSysmonPsuSeqCh0. More...
 
#define XSYSMONPSU_SEQ_CH1_OFFSET   0x00000124U
 Register: XSysmonPsuSeqCh1. More...
 
#define XSYSMONPSU_SEQ_AVERAGE0_OFFSET   0x00000128U
 Register: XSysmonPsuSeqAverage0. More...
 
#define XSYSMONPSU_SEQ_AVERAGE1_OFFSET   0x0000012CU
 Register: XSysmonPsuSeqAverage1. More...
 
#define XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET   0x00000130U
 Register: XSysmonPsuSeqInputMde0. More...
 
#define XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET   0x00000134U
 Register: XSysmonPsuSeqInputMde1. More...
 
#define XSYSMONPSU_SEQ_ACQ0_OFFSET   0x00000138U
 Register: XSysmonPsuSeqAcq0. More...
 
#define XSYSMONPSU_SEQ_ACQ1_OFFSET   0x0000013CU
 Register: XSysmonPsuSeqAcq1. More...
 
#define XSYSMONPSU_ALRM_TEMP_UPR_OFFSET   0x00000140U
 Register: XSysmonPsuAlrmTempUpr. More...
 
#define XSYSMONPSU_ALRM_SUP1_UPR_OFFSET   0x00000144U
 Register: XSysmonPsuAlrmSup1Upr. More...
 
#define XSYSMONPSU_ALRM_SUP2_UPR_OFFSET   0x00000148U
 Register: XSysmonPsuAlrmSup2Upr. More...
 
#define XSYSMONPSU_ALRM_OT_UPR_OFFSET   0x0000014CU
 Register: XSysmonPsuAlrmOtUpr. More...
 
#define XSYSMONPSU_ALRM_TEMP_LWR_OFFSET   0x00000150U
 Register: XSysmonPsuAlrmTempLwr. More...
 
#define XSYSMONPSU_ALRM_SUP1_LWR_OFFSET   0x00000154U
 Register: XSysmonPsuAlrmSup1Lwr. More...
 
#define XSYSMONPSU_ALRM_SUP2_LWR_OFFSET   0x00000158U
 Register: XSysmonPsuAlrmSup2Lwr. More...
 
#define XSYSMONPSU_ALRM_OT_LWR_OFFSET   0x0000015CU
 Register: XSysmonPsuAlrmOtLwr. More...
 
#define XSYSMONPSU_ALRM_SUP3_UPR_OFFSET   0x00000160U
 Register: XSysmonPsuAlrmSup3Upr. More...
 
#define XSYSMONPSU_ALRM_SUP4_UPR_OFFSET   0x00000164U
 Register: XSysmonPsuAlrmSup4Upr. More...
 
#define XSYSMONPSU_ALRM_SUP5_UPR_OFFSET   0x00000168U
 Register: XSysmonPsuAlrmSup5Upr. More...
 
#define XSYSMONPSU_ALRM_SUP6_UPR_OFFSET   0x0000016CU
 Register: XSysmonPsuAlrmSup6Upr. More...
 
#define XSYSMONPSU_ALRM_SUP3_LWR_OFFSET   0x00000170U
 Register: XSysmonPsuAlrmSup3Lwr. More...
 
#define XSYSMONPSU_ALRM_SUP4_LWR_OFFSET   0x00000174U
 Register: XSysmonPsuAlrmSup4Lwr. More...
 
#define XSYSMONPSU_ALRM_SUP5_LWR_OFFSET   0x00000178U
 Register: XSysmonPsuAlrmSup5Lwr. More...
 
#define XSYSMONPSU_ALRM_SUP6_LWR_OFFSET   0x0000017CU
 Register: XSysmonPsuAlrmSup6Lwr. More...
 
#define XSYSMONPSU_ALRM_SUP7_UPR_OFFSET   0x00000180U
 Register: XSysmonPsuAlrmSup7Upr. More...
 
#define XSYSMONPSU_ALRM_SUP8_UPR_OFFSET   0x00000184U
 Register: XSysmonPsuAlrmSup8Upr. More...
 
#define XSYSMONPSU_ALRM_SUP9_UPR_OFFSET   0x00000188U
 Register: XSysmonPsuAlrmSup9Upr. More...
 
#define XSYSMONPSU_ALRM_SUP10_UPR_OFFSET   0x0000018CU
 Register: XSysmonPsuAlrmSup10Upr. More...
 
#define XSYSMONPSU_ALRM_VCCAMS_UPR_OFFSET   0x00000190U
 Register: XSysmonPsuAlrmVccamsUpr. More...
 
#define XSYSMONPSU_ALRM_TREMOTE_UPR_OFFSET   0x00000194U
 Register: XSysmonPsuAlrmTremoteUpr. More...
 
#define XSYSMONPSU_ALRM_SUP7_LWR_OFFSET   0x000001A0U
 Register: XSysmonPsuAlrmSup7Lwr. More...
 
#define XSYSMONPSU_ALRM_SUP8_LWR_OFFSET   0x000001A4U
 Register: XSysmonPsuAlrmSup8Lwr. More...
 
#define XSYSMONPSU_ALRM_SUP9_LWR_OFFSET   0x000001A8U
 Register: XSysmonPsuAlrmSup9Lwr. More...
 
#define XSYSMONPSU_ALRM_SUP10_LWR_OFFSET   0x000001ACU
 Register: XSysmonPsuAlrmSup10Lwr. More...
 
#define XSYSMONPSU_ALRM_VCCAMS_LWR_OFFSET   0x000001B0U
 Register: XSysmonPsuAlrmVccamsLwr. More...
 
#define XSYSMONPSU_ALRM_TREMOTE_LWR_OFFSET   0x000001B4U
 Register: XSysmonPsuAlrmTremoteLwr. More...
 
#define XSYSMONPSU_SEQ_ACQ2_OFFSET   0x000001E4U
 Register: XSysmonPsuSeqAcq2. More...
 
#define XSYSMONPSU_SUP7_OFFSET   0x00000200U
 Register: XSysmonPsuSup7. More...
 
#define XSYSMONPSU_SUP8_OFFSET   0x00000204U
 Register: XSysmonPsuSup8. More...
 
#define XSYSMONPSU_SUP9_OFFSET   0x00000208U
 Register: XSysmonPsuSup9. More...
 
#define XSYSMONPSU_SUP10_OFFSET   0x0000020CU
 Register: XSysmonPsuSup10. More...
 
#define XSYSMONPSU_VCCAMS_OFFSET   0x00000210U
 Register: XSysmonPsuVccams. More...
 
#define XSYSMONPSU_TEMP_REMTE_OFFSET   0x00000214U
 Register: XSysmonPsuTempRemte. More...
 
#define XSYSMONPSU_MAX_SUP7_OFFSET   0x00000280U
 Register: XSysmonPsuMaxSup7. More...
 
#define XSYSMONPSU_MAX_SUP8_OFFSET   0x00000284U
 Register: XSysmonPsuMaxSup8. More...
 
#define XSYSMONPSU_MAX_SUP9_OFFSET   0x00000288U
 Register: XSysmonPsuMaxSup9. More...
 
#define XSYSMONPSU_MAX_SUP10_OFFSET   0x0000028CU
 Register: XSysmonPsuMaxSup10. More...
 
#define XSYSMONPSU_MAX_VCCAMS_OFFSET   0x00000290U
 Register: XSysmonPsuMaxVccams. More...
 
#define XSYSMONPSU_MAX_TEMP_REMTE_OFFSET   0x00000294U
 Register: XSysmonPsuMaxTempRemte. More...
 
#define XSYSMONPSU_MIN_SUP7_OFFSET   0x000002A0U
 Register: XSysmonPsuMinSup7. More...
 
#define XSYSMONPSU_MIN_SUP8_OFFSET   0x000002A4U
 Register: XSysmonPsuMinSup8. More...
 
#define XSYSMONPSU_MIN_SUP9_OFFSET   0x000002A8U
 Register: XSysmonPsuMinSup9. More...
 
#define XSYSMONPSU_MIN_SUP10_OFFSET   0x000002ACU
 Register: XSysmonPsuMinSup10. More...
 
#define XSYSMONPSU_MIN_VCCAMS_OFFSET   0x000002B0U
 Register: XSysmonPsuMinVccams. More...
 
#define XSYSMONPSU_MIN_TEMP_REMTE_OFFSET   0x000002B4U
 Register: XSysmonPsuMinTempRemte. More...
 
#define XSysmonPsu_ReadReg(RegisterAddr)   Xil_In32(RegisterAddr)
 This macro reads the given register. More...
 
#define XSysmonPsu_WriteReg(RegisterAddr, Data)   Xil_Out32(RegisterAddr, (u32)(Data))
 This macro writes the given register. More...
 

Macro Definition Documentation

◆ XSYSMONPSU_ALRM_OT_LWR_OFFSET

#define XSYSMONPSU_ALRM_OT_LWR_OFFSET   0x0000015CU

Register: XSysmonPsuAlrmOtLwr.

◆ XSYSMONPSU_ALRM_OT_UPR_OFFSET

#define XSYSMONPSU_ALRM_OT_UPR_OFFSET   0x0000014CU

Register: XSysmonPsuAlrmOtUpr.

◆ XSYSMONPSU_ALRM_SUP10_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP10_LWR_OFFSET   0x000001ACU

Register: XSysmonPsuAlrmSup10Lwr.

◆ XSYSMONPSU_ALRM_SUP10_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP10_UPR_OFFSET   0x0000018CU

Register: XSysmonPsuAlrmSup10Upr.

◆ XSYSMONPSU_ALRM_SUP1_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP1_LWR_OFFSET   0x00000154U

Register: XSysmonPsuAlrmSup1Lwr.

◆ XSYSMONPSU_ALRM_SUP1_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP1_UPR_OFFSET   0x00000144U

Register: XSysmonPsuAlrmSup1Upr.

◆ XSYSMONPSU_ALRM_SUP2_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP2_LWR_OFFSET   0x00000158U

Register: XSysmonPsuAlrmSup2Lwr.

◆ XSYSMONPSU_ALRM_SUP2_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP2_UPR_OFFSET   0x00000148U

Register: XSysmonPsuAlrmSup2Upr.

◆ XSYSMONPSU_ALRM_SUP3_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP3_LWR_OFFSET   0x00000170U

Register: XSysmonPsuAlrmSup3Lwr.

◆ XSYSMONPSU_ALRM_SUP3_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP3_UPR_OFFSET   0x00000160U

Register: XSysmonPsuAlrmSup3Upr.

◆ XSYSMONPSU_ALRM_SUP4_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP4_LWR_OFFSET   0x00000174U

Register: XSysmonPsuAlrmSup4Lwr.

◆ XSYSMONPSU_ALRM_SUP4_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP4_UPR_OFFSET   0x00000164U

Register: XSysmonPsuAlrmSup4Upr.

◆ XSYSMONPSU_ALRM_SUP5_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP5_LWR_OFFSET   0x00000178U

Register: XSysmonPsuAlrmSup5Lwr.

◆ XSYSMONPSU_ALRM_SUP5_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP5_UPR_OFFSET   0x00000168U

Register: XSysmonPsuAlrmSup5Upr.

◆ XSYSMONPSU_ALRM_SUP6_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP6_LWR_OFFSET   0x0000017CU

Register: XSysmonPsuAlrmSup6Lwr.

◆ XSYSMONPSU_ALRM_SUP6_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP6_UPR_OFFSET   0x0000016CU

Register: XSysmonPsuAlrmSup6Upr.

◆ XSYSMONPSU_ALRM_SUP7_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP7_LWR_OFFSET   0x000001A0U

Register: XSysmonPsuAlrmSup7Lwr.

◆ XSYSMONPSU_ALRM_SUP7_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP7_UPR_OFFSET   0x00000180U

Register: XSysmonPsuAlrmSup7Upr.

◆ XSYSMONPSU_ALRM_SUP8_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP8_LWR_OFFSET   0x000001A4U

Register: XSysmonPsuAlrmSup8Lwr.

◆ XSYSMONPSU_ALRM_SUP8_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP8_UPR_OFFSET   0x00000184U

Register: XSysmonPsuAlrmSup8Upr.

◆ XSYSMONPSU_ALRM_SUP9_LWR_OFFSET

#define XSYSMONPSU_ALRM_SUP9_LWR_OFFSET   0x000001A8U

Register: XSysmonPsuAlrmSup9Lwr.

◆ XSYSMONPSU_ALRM_SUP9_UPR_OFFSET

#define XSYSMONPSU_ALRM_SUP9_UPR_OFFSET   0x00000188U

Register: XSysmonPsuAlrmSup9Upr.

◆ XSYSMONPSU_ALRM_TEMP_LWR_OFFSET

#define XSYSMONPSU_ALRM_TEMP_LWR_OFFSET   0x00000150U

Register: XSysmonPsuAlrmTempLwr.

◆ XSYSMONPSU_ALRM_TEMP_UPR_OFFSET

#define XSYSMONPSU_ALRM_TEMP_UPR_OFFSET   0x00000140U

Register: XSysmonPsuAlrmTempUpr.

◆ XSYSMONPSU_ALRM_TREMOTE_LWR_OFFSET

#define XSYSMONPSU_ALRM_TREMOTE_LWR_OFFSET   0x000001B4U

Register: XSysmonPsuAlrmTremoteLwr.

◆ XSYSMONPSU_ALRM_TREMOTE_UPR_OFFSET

#define XSYSMONPSU_ALRM_TREMOTE_UPR_OFFSET   0x00000194U

Register: XSysmonPsuAlrmTremoteUpr.

◆ XSYSMONPSU_ALRM_VCCAMS_LWR_OFFSET

#define XSYSMONPSU_ALRM_VCCAMS_LWR_OFFSET   0x000001B0U

Register: XSysmonPsuAlrmVccamsLwr.

◆ XSYSMONPSU_ALRM_VCCAMS_UPR_OFFSET

#define XSYSMONPSU_ALRM_VCCAMS_UPR_OFFSET   0x00000190U

Register: XSysmonPsuAlrmVccamsUpr.

◆ XSYSMONPSU_BASEADDR

#define XSYSMONPSU_BASEADDR   0xFFA50000U

XSysmonPsu Base Address.

◆ XSYSMONPSU_CAL_ADC_BIPLR_OFF_OFFSET

#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_OFFSET   0x00000024U

Register: XSysmonPsuCalAdcBiplrOff.

◆ XSYSMONPSU_CAL_GAIN_ERR_OFFSET

#define XSYSMONPSU_CAL_GAIN_ERR_OFFSET   0x00000028U

Register: XSysmonPsuCalGainErr.

◆ XSYSMONPSU_CAL_SUP_OFF_OFFSET

#define XSYSMONPSU_CAL_SUP_OFF_OFFSET   0x00000020U

Register: XSysmonPsuCalSupOff.

◆ XSYSMONPSU_CFG_REG0_OFFSET

#define XSYSMONPSU_CFG_REG0_OFFSET   0x00000100U

Register: XSysmonPsuCfgReg0.

◆ XSYSMONPSU_CFG_REG1_OFFSET

#define XSYSMONPSU_CFG_REG1_OFFSET   0x00000104U

Register: XSysmonPsuCfgReg1.

◆ XSYSMONPSU_CFG_REG2_OFFSET

#define XSYSMONPSU_CFG_REG2_OFFSET   0x00000108U

Register: XSysmonPsuCfgReg2.

◆ XSYSMONPSU_DDRPHY_ATO_OFFSET

#define XSYSMONPSU_DDRPHY_ATO_OFFSET   0x0000008CU

Register: XSysmonPsuDdrphyAto.

◆ XSYSMONPSU_DDRPHY_VREF_OFFSET

#define XSYSMONPSU_DDRPHY_VREF_OFFSET   0x00000088U

Register: XSysmonPsuDdrphyVref.

◆ XSYSMONPSU_IDR_0_OFFSET

#define XSYSMONPSU_IDR_0_OFFSET   0x00000028U

Register: XSysmonPsuIdr0.

Referenced by XSysMonPsu_IntrDisable().

◆ XSYSMONPSU_IDR_1_OFFSET

#define XSYSMONPSU_IDR_1_OFFSET   0x0000002CU

Register: XSysmonPsuIdr1.

◆ XSYSMONPSU_IER_0_OFFSET

#define XSYSMONPSU_IER_0_OFFSET   0x00000020U

Register: XSysmonPsuIer0.

Referenced by XSysMonPsu_IntrEnable().

◆ XSYSMONPSU_IER_1_OFFSET

#define XSYSMONPSU_IER_1_OFFSET   0x00000024U

Register: XSysmonPsuIer1.

◆ XSYSMONPSU_IMR_0_OFFSET

#define XSYSMONPSU_IMR_0_OFFSET   0x00000018U

Register: XSysmonPsuImr0.

Referenced by XSysMonPsu_IntrGetEnabled().

◆ XSYSMONPSU_IMR_1_OFFSET

#define XSYSMONPSU_IMR_1_OFFSET   0x0000001CU

Register: XSysmonPsuImr1.

◆ XSYSMONPSU_ISR_0_OFFSET

#define XSYSMONPSU_ISR_0_OFFSET   0x00000010U

Register: XSysmonPsuIsr0.

Referenced by XSysMonPsu_IntrClear(), and XSysMonPsu_IntrGetStatus().

◆ XSYSMONPSU_ISR_1_OFFSET

#define XSYSMONPSU_ISR_1_OFFSET   0x00000014U

Register: XSysmonPsuIsr1.

◆ XSYSMONPSU_MAX_SUP10_OFFSET

#define XSYSMONPSU_MAX_SUP10_OFFSET   0x0000028CU

Register: XSysmonPsuMaxSup10.

◆ XSYSMONPSU_MAX_SUP1_OFFSET

#define XSYSMONPSU_MAX_SUP1_OFFSET   0x00000084U

Register: XSysmonPsuMaxSup1.

◆ XSYSMONPSU_MAX_SUP2_OFFSET

#define XSYSMONPSU_MAX_SUP2_OFFSET   0x00000088U

Register: XSysmonPsuMaxSup2.

◆ XSYSMONPSU_MAX_SUP3_OFFSET

#define XSYSMONPSU_MAX_SUP3_OFFSET   0x0000008CU

Register: XSysmonPsuMaxSup3.

◆ XSYSMONPSU_MAX_SUP4_OFFSET

#define XSYSMONPSU_MAX_SUP4_OFFSET   0x000000A0U

Register: XSysmonPsuMaxSup4.

◆ XSYSMONPSU_MAX_SUP5_OFFSET

#define XSYSMONPSU_MAX_SUP5_OFFSET   0x000000A4U

Register: XSysmonPsuMaxSup5.

◆ XSYSMONPSU_MAX_SUP6_OFFSET

#define XSYSMONPSU_MAX_SUP6_OFFSET   0x000000A8U

Register: XSysmonPsuMaxSup6.

◆ XSYSMONPSU_MAX_SUP7_OFFSET

#define XSYSMONPSU_MAX_SUP7_OFFSET   0x00000280U

Register: XSysmonPsuMaxSup7.

◆ XSYSMONPSU_MAX_SUP8_OFFSET

#define XSYSMONPSU_MAX_SUP8_OFFSET   0x00000284U

Register: XSysmonPsuMaxSup8.

◆ XSYSMONPSU_MAX_SUP9_OFFSET

#define XSYSMONPSU_MAX_SUP9_OFFSET   0x00000288U

Register: XSysmonPsuMaxSup9.

◆ XSYSMONPSU_MAX_TEMP_OFFSET

#define XSYSMONPSU_MAX_TEMP_OFFSET   0x00000080U

Register: XSysmonPsuMaxTemp.

◆ XSYSMONPSU_MAX_TEMP_REMTE_OFFSET

#define XSYSMONPSU_MAX_TEMP_REMTE_OFFSET   0x00000294U

Register: XSysmonPsuMaxTempRemte.

◆ XSYSMONPSU_MAX_VCCAMS_OFFSET

#define XSYSMONPSU_MAX_VCCAMS_OFFSET   0x00000290U

Register: XSysmonPsuMaxVccams.

◆ XSYSMONPSU_MIN_SUP10_OFFSET

#define XSYSMONPSU_MIN_SUP10_OFFSET   0x000002ACU

Register: XSysmonPsuMinSup10.

◆ XSYSMONPSU_MIN_SUP1_OFFSET

#define XSYSMONPSU_MIN_SUP1_OFFSET   0x00000094U

Register: XSysmonPsuMinSup1.

◆ XSYSMONPSU_MIN_SUP2_OFFSET

#define XSYSMONPSU_MIN_SUP2_OFFSET   0x00000098U

Register: XSysmonPsuMinSup2.

◆ XSYSMONPSU_MIN_SUP3_OFFSET

#define XSYSMONPSU_MIN_SUP3_OFFSET   0x0000009CU

Register: XSysmonPsuMinSup3.

◆ XSYSMONPSU_MIN_SUP4_OFFSET

#define XSYSMONPSU_MIN_SUP4_OFFSET   0x000000B0U

Register: XSysmonPsuMinSup4.

◆ XSYSMONPSU_MIN_SUP5_OFFSET

#define XSYSMONPSU_MIN_SUP5_OFFSET   0x000000B4U

Register: XSysmonPsuMinSup5.

◆ XSYSMONPSU_MIN_SUP6_OFFSET

#define XSYSMONPSU_MIN_SUP6_OFFSET   0x000000B8U

Register: XSysmonPsuMinSup6.

◆ XSYSMONPSU_MIN_SUP7_OFFSET

#define XSYSMONPSU_MIN_SUP7_OFFSET   0x000002A0U

Register: XSysmonPsuMinSup7.

◆ XSYSMONPSU_MIN_SUP8_OFFSET

#define XSYSMONPSU_MIN_SUP8_OFFSET   0x000002A4U

Register: XSysmonPsuMinSup8.

◆ XSYSMONPSU_MIN_SUP9_OFFSET

#define XSYSMONPSU_MIN_SUP9_OFFSET   0x000002A8U

Register: XSysmonPsuMinSup9.

◆ XSYSMONPSU_MIN_TEMP_OFFSET

#define XSYSMONPSU_MIN_TEMP_OFFSET   0x00000090U

Register: XSysmonPsuMinTemp.

◆ XSYSMONPSU_MIN_TEMP_REMTE_OFFSET

#define XSYSMONPSU_MIN_TEMP_REMTE_OFFSET   0x000002B4U

Register: XSysmonPsuMinTempRemte.

◆ XSYSMONPSU_MIN_VCCAMS_OFFSET

#define XSYSMONPSU_MIN_VCCAMS_OFFSET   0x000002B0U

Register: XSysmonPsuMinVccams.

◆ XSYSMONPSU_MISC_OFFSET

#define XSYSMONPSU_MISC_OFFSET   0x00000000U

Register: XSysmonPsuMisc.

◆ XSYSMONPSU_MON_STS_OFFSET

#define XSYSMONPSU_MON_STS_OFFSET   0x00000050U

Register: XSysmonPsuMonSts.

Referenced by XSysMonPsu_GetMonitorStatus().

◆ XSYSMONPSU_PL_SYSMON_CSTS_OFFSET

#define XSYSMONPSU_PL_SYSMON_CSTS_OFFSET   0x00000044U

Register: XSysmonPsuPlSysmonSts.

◆ XSYSMONPSU_PS_SYSMON_CSTS_OFFSET

#define XSYSMONPSU_PS_SYSMON_CSTS_OFFSET   0x00000040U

Register: XSysmonPsuPsSysmonSts.

Referenced by XSysMonPsu_SetPSAutoConversion(), and XSysMonPsu_StartAdcConversion().

◆ XSYSMONPSU_PSGT_AT0_OFFSET

#define XSYSMONPSU_PSGT_AT0_OFFSET   0x00000090U

Register: XSysmonPsuPsgtAt0.

◆ XSYSMONPSU_PSGT_AT1_OFFSET

#define XSYSMONPSU_PSGT_AT1_OFFSET   0x00000094U

Register: XSysmonPsuPsgtAt1.

◆ XSysmonPsu_ReadReg

#define XSysmonPsu_ReadReg (   RegisterAddr)    Xil_In32(RegisterAddr)

This macro reads the given register.

Parameters
RegisterAddris the register address in the address space of the SYSMONPSU device.
Returns
The 32-bit value of the register
Note
None.

Referenced by XSysMonPsu_GetMonitorStatus(), XSysMonPsu_IntrClear(), XSysMonPsu_IntrDisable(), XSysMonPsu_IntrEnable(), XSysMonPsu_IntrGetEnabled(), XSysMonPsu_IntrGetStatus(), XSysMonPsu_SetPSAutoConversion(), and XSysMonPsu_StartAdcConversion().

◆ XSYSMONPSU_RESERVE0_OFFSET

#define XSYSMONPSU_RESERVE0_OFFSET   0x00000098U

Register: XSysmonPsuReserve0.

◆ XSYSMONPSU_RESERVE1_OFFSET

#define XSYSMONPSU_RESERVE1_OFFSET   0x0000009CU

Register: XSysmonPsuReserve1.

◆ XSYSMONPSU_SEQ_ACQ0_OFFSET

#define XSYSMONPSU_SEQ_ACQ0_OFFSET   0x00000138U

Register: XSysmonPsuSeqAcq0.

◆ XSYSMONPSU_SEQ_ACQ1_OFFSET

#define XSYSMONPSU_SEQ_ACQ1_OFFSET   0x0000013CU

Register: XSysmonPsuSeqAcq1.

◆ XSYSMONPSU_SEQ_ACQ2_OFFSET

#define XSYSMONPSU_SEQ_ACQ2_OFFSET   0x000001E4U

Register: XSysmonPsuSeqAcq2.

◆ XSYSMONPSU_SEQ_AVERAGE0_OFFSET

#define XSYSMONPSU_SEQ_AVERAGE0_OFFSET   0x00000128U

Register: XSysmonPsuSeqAverage0.

◆ XSYSMONPSU_SEQ_AVERAGE1_OFFSET

#define XSYSMONPSU_SEQ_AVERAGE1_OFFSET   0x0000012CU

Register: XSysmonPsuSeqAverage1.

◆ XSYSMONPSU_SEQ_CH0_OFFSET

#define XSYSMONPSU_SEQ_CH0_OFFSET   0x00000120U

Register: XSysmonPsuSeqCh0.

◆ XSYSMONPSU_SEQ_CH1_OFFSET

#define XSYSMONPSU_SEQ_CH1_OFFSET   0x00000124U

Register: XSysmonPsuSeqCh1.

◆ XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET

#define XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET   0x00000130U

Register: XSysmonPsuSeqInputMde0.

◆ XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET

#define XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET   0x00000134U

Register: XSysmonPsuSeqInputMde1.

◆ XSYSMONPSU_STS_FLAG_OFFSET

#define XSYSMONPSU_STS_FLAG_OFFSET   0x000000FCU

Register: XSysmonPsuStsFlag.

◆ XSYSMONPSU_SUP10_OFFSET

#define XSYSMONPSU_SUP10_OFFSET   0x0000020CU

Register: XSysmonPsuSup10.

◆ XSYSMONPSU_SUP1_OFFSET

#define XSYSMONPSU_SUP1_OFFSET   0x00000004U

Register: XSysmonPsuSup1.

◆ XSYSMONPSU_SUP2_OFFSET

#define XSYSMONPSU_SUP2_OFFSET   0x00000008U

Register: XSysmonPsuSup2.

◆ XSYSMONPSU_SUP3_OFFSET

#define XSYSMONPSU_SUP3_OFFSET   0x00000018U

Register: XSysmonPsuSup3.

◆ XSYSMONPSU_SUP4_OFFSET

#define XSYSMONPSU_SUP4_OFFSET   0x00000034U

Register: XSysmonPsuSup4.

◆ XSYSMONPSU_SUP5_OFFSET

#define XSYSMONPSU_SUP5_OFFSET   0x00000038U

Register: XSysmonPsuSup5.

◆ XSYSMONPSU_SUP6_OFFSET

#define XSYSMONPSU_SUP6_OFFSET   0x0000003CU

Register: XSysmonPsuSup6.

◆ XSYSMONPSU_SUP7_OFFSET

#define XSYSMONPSU_SUP7_OFFSET   0x00000200U

Register: XSysmonPsuSup7.

◆ XSYSMONPSU_SUP8_OFFSET

#define XSYSMONPSU_SUP8_OFFSET   0x00000204U

Register: XSysmonPsuSup8.

◆ XSYSMONPSU_SUP9_OFFSET

#define XSYSMONPSU_SUP9_OFFSET   0x00000208U

Register: XSysmonPsuSup9.

◆ XSYSMONPSU_TEMP_OFFSET

#define XSYSMONPSU_TEMP_OFFSET   0x00000000U

Register: XSysmonPsuTemp.

◆ XSYSMONPSU_TEMP_REMTE_OFFSET

#define XSYSMONPSU_TEMP_REMTE_OFFSET   0x00000214U

Register: XSysmonPsuTempRemte.

◆ XSYSMONPSU_VAUX00_OFFSET

#define XSYSMONPSU_VAUX00_OFFSET   0x00000040U

Register: XSysmonPsuVaux00.

◆ XSYSMONPSU_VAUX01_OFFSET

#define XSYSMONPSU_VAUX01_OFFSET   0x00000044U

Register: XSysmonPsuVaux01.

◆ XSYSMONPSU_VAUX02_OFFSET

#define XSYSMONPSU_VAUX02_OFFSET   0x00000048U

Register: XSysmonPsuVaux02.

◆ XSYSMONPSU_VAUX03_OFFSET

#define XSYSMONPSU_VAUX03_OFFSET   0x0000004CU

Register: XSysmonPsuVaux03.

◆ XSYSMONPSU_VAUX04_OFFSET

#define XSYSMONPSU_VAUX04_OFFSET   0x00000050U

Register: XSysmonPsuVaux04.

◆ XSYSMONPSU_VAUX05_OFFSET

#define XSYSMONPSU_VAUX05_OFFSET   0x00000054U

Register: XSysmonPsuVaux05.

◆ XSYSMONPSU_VAUX06_OFFSET

#define XSYSMONPSU_VAUX06_OFFSET   0x00000058U

Register: XSysmonPsuVaux06.

◆ XSYSMONPSU_VAUX07_OFFSET

#define XSYSMONPSU_VAUX07_OFFSET   0x0000005CU

Register: XSysmonPsuVaux07.

◆ XSYSMONPSU_VAUX08_OFFSET

#define XSYSMONPSU_VAUX08_OFFSET   0x00000060U

Register: XSysmonPsuVaux08.

◆ XSYSMONPSU_VAUX09_OFFSET

#define XSYSMONPSU_VAUX09_OFFSET   0x00000064U

Register: XSysmonPsuVaux09.

◆ XSYSMONPSU_VAUX0A_OFFSET

#define XSYSMONPSU_VAUX0A_OFFSET   0x00000068U

Register: XSysmonPsuVaux0a.

◆ XSYSMONPSU_VAUX0B_OFFSET

#define XSYSMONPSU_VAUX0B_OFFSET   0x0000006CU

Register: XSysmonPsuVaux0b.

◆ XSYSMONPSU_VAUX0C_OFFSET

#define XSYSMONPSU_VAUX0C_OFFSET   0x00000070U

Register: XSysmonPsuVaux0c.

◆ XSYSMONPSU_VAUX0D_OFFSET

#define XSYSMONPSU_VAUX0D_OFFSET   0x00000074U

Register: XSysmonPsuVaux0d.

◆ XSYSMONPSU_VAUX0E_OFFSET

#define XSYSMONPSU_VAUX0E_OFFSET   0x00000078U

Register: XSysmonPsuVaux0e.

◆ XSYSMONPSU_VAUX0F_OFFSET

#define XSYSMONPSU_VAUX0F_OFFSET   0x0000007CU

Register: XSysmonPsuVaux0f.

◆ XSYSMONPSU_VCC_PSBATT_OFFSET

#define XSYSMONPSU_VCC_PSBATT_OFFSET   0x00000074U

Register: XSysmonPsuVccPsbatt.

◆ XSYSMONPSU_VCC_PSDDRPLL_OFFSET

#define XSYSMONPSU_VCC_PSDDRPLL_OFFSET   0x00000084U

Register: XSysmonPsuVccPsddrpll.

◆ XSYSMONPSU_VCC_PSPLL0_OFFSET

#define XSYSMONPSU_VCC_PSPLL0_OFFSET   0x00000060U

Register: XSysmonPsuVccPspll0.

◆ XSYSMONPSU_VCC_PSPLL1_OFFSET

#define XSYSMONPSU_VCC_PSPLL1_OFFSET   0x00000064U

Register: XSysmonPsuVccPspll1.

◆ XSYSMONPSU_VCC_PSPLL2_OFFSET

#define XSYSMONPSU_VCC_PSPLL2_OFFSET   0x00000068U

Register: XSysmonPsuVccPspll2.

◆ XSYSMONPSU_VCC_PSPLL3_OFFSET

#define XSYSMONPSU_VCC_PSPLL3_OFFSET   0x0000006CU

Register: XSysmonPsuVccPspll3.

◆ XSYSMONPSU_VCC_PSPLL4_OFFSET

#define XSYSMONPSU_VCC_PSPLL4_OFFSET   0x00000070U

Register: XSysmonPsuVccPspll4.

◆ XSYSMONPSU_VCCAMS_OFFSET

#define XSYSMONPSU_VCCAMS_OFFSET   0x00000210U

Register: XSysmonPsuVccams.

◆ XSYSMONPSU_VCCAUX_OFFSET

#define XSYSMONPSU_VCCAUX_OFFSET   0x00000080U

Register: XSysmonPsuVccaux.

◆ XSYSMONPSU_VCCBRAM_OFFSET

#define XSYSMONPSU_VCCBRAM_OFFSET   0x0000007CU

Register: XSysmonPsuVccbram.

◆ XSYSMONPSU_VCCINT_OFFSET

#define XSYSMONPSU_VCCINT_OFFSET   0x00000078U

Register: XSysmonPsuVccint.

◆ XSYSMONPSU_VP_VN_OFFSET

#define XSYSMONPSU_VP_VN_OFFSET   0x0000000CU

Register: XSysmonPsuVpVn.

◆ XSYSMONPSU_VREFN_OFFSET

#define XSYSMONPSU_VREFN_OFFSET   0x00000014U

Register: XSysmonPsuVrefn.

◆ XSYSMONPSU_VREFP_OFFSET

#define XSYSMONPSU_VREFP_OFFSET   0x00000010U

Register: XSysmonPsuVrefp.

◆ XSysmonPsu_WriteReg

#define XSysmonPsu_WriteReg (   RegisterAddr,
  Data 
)    Xil_Out32(RegisterAddr, (u32)(Data))

This macro writes the given register.

Parameters
RegisterAddris the register address in the address space of the SYSMONPSU device.
Datais the 32-bit value to write to the register.
Returns
None.
Note
None.

Referenced by SysMonPsuLowLevelExample(), and XSysMonPsu_Reset().