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rfdc
Xilinx SDK Drivers API Documentation
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The Xilinx� LogiCORE IP Zynq UltraScale+ RFSoC RF Data Converter IP core provides a configurable wrapper to allow the RF DAC and RF ADC blocks to be used in IP Integrator designs. Multiple tiles are available on each RFSoC and each tile can have a number of data converters (analog-to-digital (ADC) and digital-to-analog (DAC)). The RF ADCs can sample input frequencies up to 4 GHz at 4 GSPS with excellent noise spectral density. The RF DACs generate output carrier frequencies up to 4 GHz using the 2nd Nyquist zone with excellent noise spectral density at an update rate of 6.4 GSPS. The RF data converters also include power efficient digital down-converters (DDCs) and digital up-converters (DUCs) that include programmable interpolation and decimation, NCO and complex mixer. The DDCs and DUCs can also support dual-band operation. A maximum of 4 tiles are available on for DAC and ADC operations each. Each tile can have a maximum of 4 blocks/slices. This driver provides APIs to configure various functionalities. Similarly the driver provides APIs to read back configurations. Some of the features that the driver supports are: 1) Setting up and reading back fine mixer settings 2) Setting up and reading back coarse mixer settings 3) Reading back interpolation or decimation factors 4) Setting up and reading back QMC settings which include gain, phase etc 5) Setting up and reading back decoder mode settings 6) Setting up and reading back coarse delay settings All the APIs implemented in the driver provide appropriate range checks. An API has been provided for debug purpose which will dump all registers for a requested tile. Inline functions have also been provided to read back the parameters initially configured through the GUI.
There are plans to add more features, e.g. Support for multi band, PLL configurations etc.
MODIFICATION HISTORY:
Ver Who Date Changes
1.0 sk 05/16/17 Initial release 2.0 sk 08/09/17 Fixed coarse Mixer configuration settings CR# 977266, 977872. Return error for Slice Event on 4G ADC Block. Corrected Interrupt Macro names and values. 08/16/17 Add support for SYSREF and PL event sources. 08/18/17 Add API to enable and disable FIFO. 08/23/17 Add API to configure Nyquist zone. 08/30/17 Add additional info to BlockStatus. 08/30/17 Add support for Coarse Mixer BYPASS mode. 08/31/17 Removed Tile Reset Assert and Deassert. 09/07/17 Add support for negative NCO freq. 09/15/17 Fixed NCO freq precision issue. 09/15/17 Fixed Immediate Event source issue and also updated the Immediate Macro value to 0. 2.1 sk 09/15/17 Remove Libmetal library dependency for MB. 09/18/17 Add API to clear the interrupts. sk 09/21/17 Add BAREMETAL compiler flag option for Baremetal. sk 09/21/17 Add support for Over voltage and Over Range interrupts. sk 09/22/17 Add s64 typedef for Linux. sk 09/24/17 Fixed Get_Tile/BlockBaseAddr always giving ADC related address. sk 09/25/17 Modified XRFdc_GetBlockStatus API to give correct information and also updates the description for Vector Param in intr handler Add API to get Output current and removed GetTermVoltage and GetOutputCurr inline functions.