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gpiops
Xilinx SDK Drivers API Documentation
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Data Structures | |
struct | XGpioPs_Config |
This typedef contains configuration information for a device. More... | |
struct | XGpioPs |
The XGpioPs driver instance data. More... | |
Macros | |
#define | XGPIOPS_BANK_MAX_PINS (u32)32 |
Max pins in a GPIO bank. More... | |
#define | XGPIOPS_BANK0 0x00U |
GPIO Bank 0. More... | |
#define | XGPIOPS_BANK1 0x01U |
GPIO Bank 1. More... | |
#define | XGPIOPS_BANK2 0x02U |
GPIO Bank 2. More... | |
#define | XGPIOPS_BANK3 0x03U |
GPIO Bank 3. More... | |
#define | XGPIOPS_MAX_BANKS_ZYNQMP 0x06U |
Max banks in a Zynq Ultrascale+ MP GPIO device. More... | |
#define | XGPIOPS_MAX_BANKS 0x04U |
Max banks in a Zynq GPIO device. More... | |
#define | XGPIOPS_DEVICE_MAX_PIN_NUM_ZYNQMP (u32)174 |
Max pins in the Zynq Ultrascale+ MP GPIO device 0 - 25, Bank 0 26 - 51, Bank 1 52 - 77, Bank 2 78 - 109, Bank 3 110 - 141, Bank 4 142 - 173, Bank 5. More... | |
#define | XGPIOPS_DEVICE_MAX_PIN_NUM (u32)118 |
Max pins in the Zynq GPIO device 0 - 31, Bank 0 32 - 53, Bank 1 54 - 85, Bank 2 86 - 117, Bank 3. More... | |
#define | XGpioPs_ReadReg(BaseAddr, RegOffset) Xil_In32((BaseAddr) + (u32)(RegOffset)) |
This macro reads the given register. More... | |
#define | XGpioPs_WriteReg(BaseAddr, RegOffset, Data) Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data)) |
This macro writes to the given register. More... | |
Typedefs | |
typedef void(* | XGpioPs_Handler) (void *CallBackRef, u32 Bank, u32 Status) |
This handler data type allows the user to define a callback function to handle the interrupts for the GPIO device. More... | |
Functions | |
void | StubHandler (void *CallBackRef, u32 Bank, u32 Status) |
This is a stub for the status callback. More... | |
u32 | XGpioPs_Read (XGpioPs *InstancePtr, u8 Bank) |
Read the Data register of the specified GPIO bank. More... | |
u32 | XGpioPs_ReadPin (XGpioPs *InstancePtr, u32 Pin) |
Read Data from the specified pin. More... | |
void | XGpioPs_Write (XGpioPs *InstancePtr, u8 Bank, u32 Data) |
Write to the Data register of the specified GPIO bank. More... | |
void | XGpioPs_WritePin (XGpioPs *InstancePtr, u32 Pin, u32 Data) |
Write data to the specified pin. More... | |
void | XGpioPs_SetDirection (XGpioPs *InstancePtr, u8 Bank, u32 Direction) |
Set the Direction of the pins of the specified GPIO Bank. More... | |
void | XGpioPs_SetDirectionPin (XGpioPs *InstancePtr, u32 Pin, u32 Direction) |
Set the Direction of the specified pin. More... | |
u32 | XGpioPs_GetDirection (XGpioPs *InstancePtr, u8 Bank) |
Get the Direction of the pins of the specified GPIO Bank. More... | |
u32 | XGpioPs_GetDirectionPin (XGpioPs *InstancePtr, u32 Pin) |
Get the Direction of the specified pin. More... | |
void | XGpioPs_SetOutputEnable (XGpioPs *InstancePtr, u8 Bank, u32 OpEnable) |
Set the Output Enable of the pins of the specified GPIO Bank. More... | |
void | XGpioPs_SetOutputEnablePin (XGpioPs *InstancePtr, u32 Pin, u32 OpEnable) |
Set the Output Enable of the specified pin. More... | |
u32 | XGpioPs_GetOutputEnable (XGpioPs *InstancePtr, u8 Bank) |
Get the Output Enable status of the pins of the specified GPIO Bank. More... | |
u32 | XGpioPs_GetOutputEnablePin (XGpioPs *InstancePtr, u32 Pin) |
Get the Output Enable status of the specified pin. More... | |
s32 | XGpioPs_SelfTest (XGpioPs *InstancePtr) |
This function runs a self-test on the GPIO driver/device. More... | |
void | XGpioPs_IntrEnable (XGpioPs *InstancePtr, u8 Bank, u32 Mask) |
This function enables the interrupts for the specified pins in the specified bank. More... | |
void | XGpioPs_IntrDisable (XGpioPs *InstancePtr, u8 Bank, u32 Mask) |
This function disables the interrupts for the specified pins in the specified bank. More... | |
u32 | XGpioPs_IntrGetEnabled (XGpioPs *InstancePtr, u8 Bank) |
This function returns the interrupt enable status for a bank. More... | |
u32 | XGpioPs_IntrGetStatus (XGpioPs *InstancePtr, u8 Bank) |
This function returns interrupt status read from Interrupt Status Register. More... | |
void | XGpioPs_IntrClear (XGpioPs *InstancePtr, u8 Bank, u32 Mask) |
This function clears pending interrupt(s) with the provided mask. More... | |
void | XGpioPs_SetIntrType (XGpioPs *InstancePtr, u8 Bank, u32 IntrType, u32 IntrPolarity, u32 IntrOnAny) |
This function is used for setting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins. More... | |
void | XGpioPs_GetIntrType (XGpioPs *InstancePtr, u8 Bank, u32 *IntrType, u32 *IntrPolarity, u32 *IntrOnAny) |
This function is used for getting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins. More... | |
void | XGpioPs_SetCallbackHandler (XGpioPs *InstancePtr, void *CallBackRef, XGpioPs_Handler FuncPointer) |
This function sets the status callback function. More... | |
void | XGpioPs_IntrHandler (XGpioPs *InstancePtr) |
This function is the interrupt handler for GPIO interrupts.It checks the interrupt status registers of all the banks to determine the actual bank in which an interrupt has been triggered. More... | |
void | XGpioPs_SetIntrTypePin (XGpioPs *InstancePtr, u32 Pin, u8 IrqType) |
This function is used for setting the IRQ Type of a single GPIO pin. More... | |
u8 | XGpioPs_GetIntrTypePin (XGpioPs *InstancePtr, u32 Pin) |
This function returns the IRQ Type of a given GPIO pin. More... | |
void | XGpioPs_IntrEnablePin (XGpioPs *InstancePtr, u32 Pin) |
This function enables the interrupt for the specified pin. More... | |
void | XGpioPs_IntrDisablePin (XGpioPs *InstancePtr, u32 Pin) |
This function disables the interrupts for the specified pin. More... | |
u32 | XGpioPs_IntrGetEnabledPin (XGpioPs *InstancePtr, u32 Pin) |
This function returns whether interrupts are enabled for the specified pin. More... | |
u32 | XGpioPs_IntrGetStatusPin (XGpioPs *InstancePtr, u32 Pin) |
This function returns interrupt enable status of the specified pin. More... | |
void | XGpioPs_IntrClearPin (XGpioPs *InstancePtr, u32 Pin) |
This function clears the specified pending interrupt. More... | |
XGpioPs_Config * | XGpioPs_LookupConfig (u16 DeviceId) |
This function looks for the device configuration based on the unique device ID. More... | |
Variables | |
XGpioPs_Config | XGpioPs_ConfigTable [XPAR_XGPIOPS_NUM_INSTANCES] |
This table contains configuration information for each GPIO device in the system. More... | |
XGpioPs_Config | XGpioPs_ConfigTable [XPAR_XGPIOPS_NUM_INSTANCES] |
This table contains configuration information for each GPIO device in the system. More... | |
Interrupt types | |
The following constants define the interrupt types that can be set for each GPIO pin. | |
#define | XGPIOPS_IRQ_TYPE_EDGE_RISING 0x00U |
Interrupt on Rising edge. More... | |
#define | XGPIOPS_IRQ_TYPE_EDGE_FALLING 0x01U |
Interrupt Falling edge. More... | |
#define | XGPIOPS_IRQ_TYPE_EDGE_BOTH 0x02U |
Interrupt on both edges. More... | |
#define | XGPIOPS_IRQ_TYPE_LEVEL_HIGH 0x03U |
Interrupt on high level. More... | |
#define | XGPIOPS_IRQ_TYPE_LEVEL_LOW 0x04U |
Interrupt on low level. More... | |
#define XGPIOPS_BANK0 0x00U |
#define XGPIOPS_BANK1 0x01U |
#include <xgpiops.h>
GPIO Bank 1.
#define XGPIOPS_BANK2 0x02U |
#include <xgpiops.h>
GPIO Bank 2.
#define XGPIOPS_BANK3 0x03U |
#include <xgpiops.h>
GPIO Bank 3.
#define XGPIOPS_BANK_MAX_PINS (u32)32 |
#include <xgpiops.h>
Max pins in a GPIO bank.
#define XGPIOPS_DEVICE_MAX_PIN_NUM (u32)118 |
#include <xgpiops.h>
Max pins in the Zynq GPIO device 0 - 31, Bank 0 32 - 53, Bank 1 54 - 85, Bank 2 86 - 117, Bank 3.
#define XGPIOPS_DEVICE_MAX_PIN_NUM_ZYNQMP (u32)174 |
#include <xgpiops.h>
Max pins in the Zynq Ultrascale+ MP GPIO device 0 - 25, Bank 0 26 - 51, Bank 1 52 - 77, Bank 2 78 - 109, Bank 3 110 - 141, Bank 4 142 - 173, Bank 5.
#define XGPIOPS_IRQ_TYPE_EDGE_BOTH 0x02U |
#include <xgpiops.h>
Interrupt on both edges.
#define XGPIOPS_IRQ_TYPE_EDGE_FALLING 0x01U |
#include <xgpiops.h>
Interrupt Falling edge.
#define XGPIOPS_IRQ_TYPE_EDGE_RISING 0x00U |
#include <xgpiops.h>
Interrupt on Rising edge.
#define XGPIOPS_IRQ_TYPE_LEVEL_HIGH 0x03U |
#include <xgpiops.h>
Interrupt on high level.
#define XGPIOPS_IRQ_TYPE_LEVEL_LOW 0x04U |
#define XGPIOPS_MAX_BANKS 0x04U |
#include <xgpiops.h>
Max banks in a Zynq GPIO device.
#define XGPIOPS_MAX_BANKS_ZYNQMP 0x06U |
#include <xgpiops.h>
Max banks in a Zynq Ultrascale+ MP GPIO device.
#define XGpioPs_ReadReg | ( | BaseAddr, | |
RegOffset | |||
) | Xil_In32((BaseAddr) + (u32)(RegOffset)) |
#include <xgpiops_hw.h>
This macro reads the given register.
BaseAddr | is the base address of the device. |
RegOffset | is the register offset to be read. |
Referenced by XGpioPs_GetDirection(), XGpioPs_GetIntrType(), XGpioPs_GetOutputEnable(), XGpioPs_IntrGetEnabled(), XGpioPs_IntrGetStatus(), and XGpioPs_Read().
#define XGpioPs_WriteReg | ( | BaseAddr, | |
RegOffset, | |||
Data | |||
) | Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data)) |
#include <xgpiops_hw.h>
This macro writes to the given register.
BaseAddr | is the base address of the device. |
RegOffset | is the offset of the register to be written. |
Data | is the 32-bit value to write to the register. |
Referenced by XGpioPs_IntrClear(), XGpioPs_IntrDisable(), XGpioPs_IntrEnable(), XGpioPs_SetDirection(), XGpioPs_SetIntrType(), XGpioPs_SetOutputEnable(), and XGpioPs_Write().
typedef void(* XGpioPs_Handler) (void *CallBackRef, u32 Bank, u32 Status) |
#include <xgpiops.h>
This handler data type allows the user to define a callback function to handle the interrupts for the GPIO device.
The application using this driver is expected to define a handler of this type, to support interrupt driven mode. The handler executes in an interrupt context such that minimal processing should be performed.
CallBackRef | is a callback reference passed in by the upper layer when setting the callback functions for a GPIO bank. It is passed back to the upper layer when the callback is invoked. Its type is not important to the driver component, so it is a void pointer. |
Bank | is the bank for which the interrupt status has changed. |
Status | is the Interrupt status of the GPIO bank. |
void StubHandler | ( | void * | CallBackRef, |
u32 | Bank, | ||
u32 | Status | ||
) |
#include <xgpiops.c>
This is a stub for the status callback.
The stub is here in case the upper layers do not set the handler.
CallBackRef | is a pointer to the upper layer callback reference |
Bank | is the GPIO Bank in which an interrupt occurred. |
Status | is the Interrupt status of the GPIO bank. |
u32 XGpioPs_GetDirection | ( | XGpioPs * | InstancePtr, |
u8 | Bank | ||
) |
#include <xgpiops.c>
Get the Direction of the pins of the specified GPIO Bank.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
return Returns a 32 bit mask of the Direction register. Bits with 0 are in Input mode, bits with 1 are in Output Mode.
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.
u32 XGpioPs_GetDirectionPin | ( | XGpioPs * | InstancePtr, |
u32 | Pin | ||
) |
#include <xgpiops.c>
Get the Direction of the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number for which the Direction is to be retrieved. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
References XGpioPs::IsReady.
void XGpioPs_GetIntrType | ( | XGpioPs * | InstancePtr, |
u8 | Bank, | ||
u32 * | IntrType, | ||
u32 * | IntrPolarity, | ||
u32 * | IntrOnAny | ||
) |
#include <xgpiops.h>
This function is used for getting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins.
InstancePtr | is a pointer to an XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
IntrType | returns the 32 bit mask of the interrupt type. 0 means Level Sensitive and 1 means Edge Sensitive. |
IntrPolarity | returns the 32 bit mask of the interrupt polarity. 0 means Active Low or Falling Edge and 1 means Active High or Rising Edge. |
IntrOnAny | returns the 32 bit mask of the interrupt trigger for edge triggered interrupts. 0 means trigger on single edge using the configured interrupt polarity and 1 means trigger on both edges. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.
Referenced by XGpioPs_SelfTest().
u8 XGpioPs_GetIntrTypePin | ( | XGpioPs * | InstancePtr, |
u32 | Pin | ||
) |
#include <xgpiops.h>
This function returns the IRQ Type of a given GPIO pin.
InstancePtr | is a pointer to an XGpioPs instance. |
Pin | is the pin number whose IRQ type is to be obtained. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
References XGpioPs::IsReady.
u32 XGpioPs_GetOutputEnable | ( | XGpioPs * | InstancePtr, |
u8 | Bank | ||
) |
#include <xgpiops.c>
Get the Output Enable status of the pins of the specified GPIO Bank.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
return Returns a a 32 bit mask of the Output Enable register. Bits with 0 are in Disabled state, bits with 1 are in Enabled State.
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.
u32 XGpioPs_GetOutputEnablePin | ( | XGpioPs * | InstancePtr, |
u32 | Pin | ||
) |
#include <xgpiops.c>
Get the Output Enable status of the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number for which the Output Enable status is to be retrieved. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
References XGpioPs::IsReady.
void XGpioPs_IntrClear | ( | XGpioPs * | InstancePtr, |
u8 | Bank, | ||
u32 | Mask | ||
) |
#include <xgpiops.h>
This function clears pending interrupt(s) with the provided mask.
This function should be called after the software has serviced the interrupts that are pending.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
Mask | is the mask of the interrupts to be cleared. Bit positions of 1 will be cleared. Bit positions of 0 will not change the previous interrupt status. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.
Referenced by XGpioPs_IntrHandler().
void XGpioPs_IntrClearPin | ( | XGpioPs * | InstancePtr, |
u32 | Pin | ||
) |
#include <xgpiops.h>
This function clears the specified pending interrupt.
This function should be called after the software has serviced the interrupts that are pending.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number for which the interrupt status is to be cleared. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
References XGpioPs::IsReady.
void XGpioPs_IntrDisable | ( | XGpioPs * | InstancePtr, |
u8 | Bank, | ||
u32 | Mask | ||
) |
#include <xgpiops.h>
This function disables the interrupts for the specified pins in the specified bank.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
Mask | is the bit mask of the pins for which interrupts are to be disabled. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.
Referenced by XGpioPs_SelfTest().
void XGpioPs_IntrDisablePin | ( | XGpioPs * | InstancePtr, |
u32 | Pin | ||
) |
#include <xgpiops.h>
This function disables the interrupts for the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number for which the interrupt is to be disabled. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
References XGpioPs::IsReady.
void XGpioPs_IntrEnable | ( | XGpioPs * | InstancePtr, |
u8 | Bank, | ||
u32 | Mask | ||
) |
#include <xgpiops.h>
This function enables the interrupts for the specified pins in the specified bank.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
Mask | is the bit mask of the pins for which interrupts are to be enabled. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.
Referenced by XGpioPs_SelfTest().
void XGpioPs_IntrEnablePin | ( | XGpioPs * | InstancePtr, |
u32 | Pin | ||
) |
#include <xgpiops.h>
This function enables the interrupt for the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number for which the interrupt is to be enabled. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
References XGpioPs::IsReady.
u32 XGpioPs_IntrGetEnabled | ( | XGpioPs * | InstancePtr, |
u8 | Bank | ||
) |
#include <xgpiops.h>
This function returns the interrupt enable status for a bank.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.
Referenced by XGpioPs_IntrHandler(), and XGpioPs_SelfTest().
u32 XGpioPs_IntrGetEnabledPin | ( | XGpioPs * | InstancePtr, |
u32 | Pin | ||
) |
#include <xgpiops.h>
This function returns whether interrupts are enabled for the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number for which the interrupt enable status is to be known. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
References XGpioPs::IsReady.
u32 XGpioPs_IntrGetStatus | ( | XGpioPs * | InstancePtr, |
u8 | Bank | ||
) |
#include <xgpiops.h>
This function returns interrupt status read from Interrupt Status Register.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.
Referenced by XGpioPs_IntrHandler().
u32 XGpioPs_IntrGetStatusPin | ( | XGpioPs * | InstancePtr, |
u32 | Pin | ||
) |
#include <xgpiops.h>
This function returns interrupt enable status of the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number for which the interrupt enable status is to be known. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
References XGpioPs::IsReady.
void XGpioPs_IntrHandler | ( | XGpioPs * | InstancePtr | ) |
#include <xgpiops.h>
This function is the interrupt handler for GPIO interrupts.It checks the interrupt status registers of all the banks to determine the actual bank in which an interrupt has been triggered.
It then calls the upper layer callback handler set by the function XGpioPs_SetBankHandler(). The callback is called when an interrupt
InstancePtr | is a pointer to the XGpioPs instance. |
References XGpioPs::Handler, XGpioPs::IsReady, XGpioPs::MaxBanks, XGpioPs_IntrClear(), XGpioPs_IntrGetEnabled(), and XGpioPs_IntrGetStatus().
XGpioPs_Config * XGpioPs_LookupConfig | ( | u16 | DeviceId | ) |
#include <xgpiops.h>
This function looks for the device configuration based on the unique device ID.
The table XGpioPs_ConfigTable[] contains the configuration information for each device in the system.
DeviceId | is the unique device ID of the device being looked up. |
u32 XGpioPs_Read | ( | XGpioPs * | InstancePtr, |
u8 | Bank | ||
) |
#include <xgpiops.c>
Read the Data register of the specified GPIO bank.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.
u32 XGpioPs_ReadPin | ( | XGpioPs * | InstancePtr, |
u32 | Pin | ||
) |
#include <xgpiops.c>
Read Data from the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number for which the data has to be read. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. See xgpiops.h for the mapping of the pin numbers in the banks. |
References XGpioPs::IsReady.
s32 XGpioPs_SelfTest | ( | XGpioPs * | InstancePtr | ) |
#include <xgpiops.h>
This function runs a self-test on the GPIO driver/device.
This function does a register read/write test on some of the Interrupt Registers.
InstancePtr | is a pointer to the XGpioPs instance. |
References XGpioPs::IsReady, XGPIOPS_BANK0, XGpioPs_GetIntrType(), XGpioPs_IntrDisable(), XGpioPs_IntrEnable(), XGpioPs_IntrGetEnabled(), and XGpioPs_SetIntrType().
void XGpioPs_SetCallbackHandler | ( | XGpioPs * | InstancePtr, |
void * | CallBackRef, | ||
XGpioPs_Handler | FuncPointer | ||
) |
#include <xgpiops.h>
This function sets the status callback function.
The callback function is called by the XGpioPs_IntrHandler when an interrupt occurs.
InstancePtr | is a pointer to the XGpioPs instance. |
CallBackRef | is the upper layer callback reference passed back when the callback function is invoked. |
FuncPtr | is the pointer to the callback function. |
References XGpioPs::CallBackRef, XGpioPs::Handler, and XGpioPs::IsReady.
void XGpioPs_SetDirection | ( | XGpioPs * | InstancePtr, |
u8 | Bank, | ||
u32 | Direction | ||
) |
#include <xgpiops.c>
Set the Direction of the pins of the specified GPIO Bank.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
Direction | is the 32 bit mask of the Pin direction to be set for all the pins in the Bank. Bits with 0 are set to Input mode, bits with 1 are set to Output Mode. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.
void XGpioPs_SetDirectionPin | ( | XGpioPs * | InstancePtr, |
u32 | Pin, | ||
u32 | Direction | ||
) |
#include <xgpiops.c>
Set the Direction of the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number to which the Data is to be written. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
Direction | is the direction to be set for the specified pin. Valid values are 0 for Input Direction, 1 for Output Direction. |
References XGpioPs::IsReady.
void XGpioPs_SetIntrType | ( | XGpioPs * | InstancePtr, |
u8 | Bank, | ||
u32 | IntrType, | ||
u32 | IntrPolarity, | ||
u32 | IntrOnAny | ||
) |
#include <xgpiops.h>
This function is used for setting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins.
InstancePtr | is a pointer to an XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
IntrType | is the 32 bit mask of the interrupt type. 0 means Level Sensitive and 1 means Edge Sensitive. |
IntrPolarity | is the 32 bit mask of the interrupt polarity. 0 means Active Low or Falling Edge and 1 means Active High or Rising Edge. |
IntrOnAny | is the 32 bit mask of the interrupt trigger for edge triggered interrupts. 0 means trigger on single edge using the configured interrupt polarity and 1 means trigger on both edges. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.
Referenced by XGpioPs_SelfTest().
void XGpioPs_SetIntrTypePin | ( | XGpioPs * | InstancePtr, |
u32 | Pin, | ||
u8 | IrqType | ||
) |
#include <xgpiops.h>
This function is used for setting the IRQ Type of a single GPIO pin.
InstancePtr | is a pointer to an XGpioPs instance. |
Pin | is the pin number whose IRQ type is to be set. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
IrqType | is the IRQ type for GPIO Pin. Use XGPIOPS_IRQ_TYPE_* defined in xgpiops.h to specify the IRQ type. |
< Default statement is added for MISRA C compliance.
References XGpioPs::IsReady, and XGPIOPS_IRQ_TYPE_LEVEL_LOW.
void XGpioPs_SetOutputEnable | ( | XGpioPs * | InstancePtr, |
u8 | Bank, | ||
u32 | OpEnable | ||
) |
#include <xgpiops.c>
Set the Output Enable of the pins of the specified GPIO Bank.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
OpEnable | is the 32 bit mask of the Output Enables to be set for all the pins in the Bank. The Output Enable of bits with 0 are disabled, the Output Enable of bits with 1 are enabled. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.
void XGpioPs_SetOutputEnablePin | ( | XGpioPs * | InstancePtr, |
u32 | Pin, | ||
u32 | OpEnable | ||
) |
#include <xgpiops.c>
Set the Output Enable of the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number to which the Data is to be written. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
OpEnable | specifies whether the Output Enable for the specified pin should be enabled. Valid values are 0 for Disabling Output Enable, 1 for Enabling Output Enable. |
References XGpioPs::IsReady.
void XGpioPs_Write | ( | XGpioPs * | InstancePtr, |
u8 | Bank, | ||
u32 | Data | ||
) |
#include <xgpiops.c>
Write to the Data register of the specified GPIO bank.
InstancePtr | is a pointer to the XGpioPs instance. |
Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP. |
Data | is the value to be written to the Data register. |
References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.
void XGpioPs_WritePin | ( | XGpioPs * | InstancePtr, |
u32 | Pin, | ||
u32 | Data | ||
) |
#include <xgpiops.c>
Write data to the specified pin.
InstancePtr | is a pointer to the XGpioPs instance. |
Pin | is the pin number to which the Data is to be written. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. |
Data | is the data to be written to the specified pin (0 or 1). |
References XGpioPs::IsReady.
XGpioPs_Config XGpioPs_ConfigTable[XPAR_XGPIOPS_NUM_INSTANCES] |
#include <xgpiops_sinit.c>
This table contains configuration information for each GPIO device in the system.
XGpioPs_Config XGpioPs_ConfigTable[XPAR_XGPIOPS_NUM_INSTANCES] |
#include <xgpiops_g.c>
This table contains configuration information for each GPIO device in the system.