rfdc
Xilinx SDK Drivers API Documentation
rfdc Documentation

The Xilinx� LogiCORE IP Zynq UltraScale+ RFSoC RF Data Converter IP core provides a configurable wrapper to allow the RF DAC and RF ADC blocks to be used in IP Integrator designs. Multiple tiles are available on each RFSoC and each tile can have a number of data converters (analog-to-digital (ADC) and digital-to-analog (DAC)). The RF ADCs can sample input frequencies up to 4 GHz at 4 GSPS with excellent noise spectral density. The RF DACs generate output carrier frequencies up to 4 GHz using the 2nd Nyquist zone with excellent noise spectral density at an update rate of 6.4 GSPS. The RF data converters also include power efficient digital down-converters (DDCs) and digital up-converters (DUCs) that include programmable interpolation and decimation, NCO and complex mixer. The DDCs and DUCs can also support dual-band operation. A maximum of 4 tiles are available on for DAC and ADC operations each. Each tile can have a maximum of 4 blocks/slices. This driver provides APIs to configure various functionalities. Similarly the driver provides APIs to read back configurations. Some of the features that the driver supports are: 1) Setting up and reading back fine mixer settings 2) Setting up and reading back coarse mixer settings 3) Reading back interpolation or decimation factors 4) Setting up and reading back QMC settings which include gain, phase etc 5) Setting up and reading back decoder mode settings 6) Setting up and reading back coarse delay settings All the APIs implemented in the driver provide appropriate range checks. An API has been provided for debug purpose which will dump all registers for a requested tile. Inline functions have also been provided to read back the parameters initially configured through the GUI.

There are plans to add more features, e.g. Support for multi band, PLL configurations etc.

MODIFICATION HISTORY:
Ver   Who    Date     Changes

1.0 sk 05/16/17 Initial release 2.0 sk 08/09/17 Fixed coarse Mixer configuration settings CR# 977266, 977872. Return error for Slice Event on 4G ADC Block. Corrected Interrupt Macro names and values. 08/16/17 Add support for SYSREF and PL event sources. 08/18/17 Add API to enable and disable FIFO. 08/23/17 Add API to configure Nyquist zone. 08/30/17 Add additional info to BlockStatus. 08/30/17 Add support for Coarse Mixer BYPASS mode. 08/31/17 Removed Tile Reset Assert and Deassert. 09/07/17 Add support for negative NCO freq. 09/15/17 Fixed NCO freq precision issue. 09/15/17 Fixed Immediate Event source issue and also updated the Immediate Macro value to 0. 2.1 sk 09/15/17 Remove Libmetal library dependency for MB. 09/18/17 Add API to clear the interrupts. sk 09/21/17 Add BAREMETAL compiler flag option for Baremetal. sk 09/21/17 Add support for Over voltage and Over Range interrupts. sk 09/22/17 Add s64 typedef for Linux. sk 09/24/17 Fixed Get_Tile/BlockBaseAddr always giving ADC related address. sk 09/25/17 Modified XRFdc_GetBlockStatus API to give correct information and also updates the description for Vector Param in intr handler Add API to get Output current and removed GetTermVoltage and GetOutputCurr inline functions. 2.2 sk 10/05/17 Fixed XRFdc_GetNoOfADCBlocks API for 4GSPS. Enable the decoder clock based on decoder mode. Add API to get the current FIFO status. Updated XRFdc_DumpRegs API for better readability of output register dump. Add support for 4GSPS CoarseMixer frequency. 10/11/17 Modify float types to double to increase precision. 10/12/17 Update BlockStatus API to give current status. In BYPASS mode, input datatype can be Real or IQ hence checked both while reading the mixer mode. 10/17/17 Fixed Set Threshold API Issue. 2.2 sk 10/18/17 Add support for FIFO and DATA overflow interrupt 2.3 sk 11/06/17 Fixed PhaseOffset truncation issue. Provide user configurability for FineMixerScale. 11/08/17 Return error for DAC R2C mode and ADC C2R mode. 11/10/17 Corrected FIFO and DATA Interrupt masks. 11/20/17 Fixed StartUp, Shutdown and Reset API for Tile_Id -1. 11/20/17 Remove unwanted ADC block checks in 4GSPS mode. 3.0 sk 12/11/17 Added DDC and DUC support. 12/13/17 Add CoarseMixMode field in Mixer_Settings structure. 12/15/17 Add support to switch calibration modes. 12/15/17 Add support for mixer frequencies > Fs/2 and < -Fs/2. sg 13/01/18 Added PLL and external clock switch support Added API to get PLL lock status. Added API to get clock source. sk 01/18/18 Add API to get driver version. 3.1 jm 01/24/18 Add Multi-tile sync support. sk 01/25/18 Updated Set and Get Interpolation/Decimation factor API's to consider the actual factor value. 3.2 sk 02/02/18 Add API's to configure inverse-sinc. sk 02/27/18 Add API's to configure Multiband. sk 03/09/18 Update PLL structure in XRFdc_DynamicPLLConfig API. sk 03/09/18 Update ADC and DAC datatypes in Mixer API and use input datatype for ADC in threshold and QMC APIs. sk 03/09/18 Removed FIFO disable check in DDC and DUC APIs. sk 03/09/18 Add support for Marker event source for DAC block. jm 03/12/18 Fixed DAC latency calculation in MTS. jm 03/12/18 Added support for reloading DTC scans. jm 03/12/18 Add option to configure sysref capture after MTS. sk 03/22/18 Updated PLL settings based on latest IP values. 4.0 sk 04/09/18 Added API to enable/disable the sysref. sk 04/09/18 Updated max VCO to 13108MHz to support max DAC sample rate of 6.554MHz. rk 04/17/18 Adjust calculated latency by sysref period, where doing so results in closer alignment to the target latency. sk 04/17/18 Corrected Set/Get MixerSettings API description for FineMixerScale parameter. sk 04/19/18 Enable VCO Auto selection while configuring the clock. sk 04/24/18 Add API to get PLL Configurations. sk 04/24/18 Add API to get the Link Coupling mode. sk 04/28/18 Implement timeouts for PLL Lock, Startup and shutdown. sk 05/30/18 Removed CalibrationMode check for DAC. sk 06/05/18 Updated minimum Ref clock value to 102.40625MHz.