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mcdma
Xilinx SDK Drivers API Documentation
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This file demonstrates how to use the mcdma driver on the Xilinx AXI MCDMA core (AXI MCDMA) to transfer packets in interrupt mode.
This examples shows how to do multiple packets transfers, as well as how to do multiple show how to do multiple packets transfers, as well as how to do multiple BD's per packet transfers.
H/W Requirments: In order to test this example at the h/w level AXI MCDMA MM2S should connect with the S2MM.
System level Considerations for ZynqUltrascale+ designs: Please refer xmcdma_polled_example.c file.
MODIFICATION HISTORY:
Ver Who Date Changes ----- ---- -------- ------------------------------------------------------- 1.0 adk 18/07/17 Initial Version.
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int | main (void) |
Main function. More... | |
int main | ( | void | ) |
Main function.
This function is the main entry of the tests on DMA core. It sets up DMA engine to be ready to receive and send packets, then a packet is transmitted and will be verified after it is received via the DMA.
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