dsi
Xilinx SDK Drivers API Documentation
XDsi_Config Struct Reference

The configuration structure for DSI Controller This structure passes the hardware building information to the driver. More...

Data Fields

u32 DeviceId
 Device Id. More...
 
UINTPTR BaseAddr
 Base address of DSI Controller. More...
 
u8 DsiLanes
 DSI supported lanes1, 2, 3, 4. More...
 
u8 DataType
 RGB type. More...
 
u32 DsiByteFifo
 DSI byte FIFO size 128, 256, 512, 1024, 2048, 4096, 8192, 16384. More...
 
u8 CrcGen
 CRC Generation enable status. More...
 
u8 DsiPixel
 Pixels per beat receive on input stream. More...
 

Detailed Description

The configuration structure for DSI Controller This structure passes the hardware building information to the driver.

Field Documentation

◆ BaseAddr

UINTPTR XDsi_Config::BaseAddr

Base address of DSI Controller.

Referenced by DsiSelfTestExample(), and XDsi_CfgInitialize().

◆ CrcGen

u8 XDsi_Config::CrcGen

CRC Generation enable status.

◆ DataType

u8 XDsi_Config::DataType

RGB type.

◆ DeviceId

u32 XDsi_Config::DeviceId

Device Id.

◆ DsiByteFifo

u32 XDsi_Config::DsiByteFifo

DSI byte FIFO size 128, 256, 512, 1024, 2048, 4096, 8192, 16384.

◆ DsiLanes

u8 XDsi_Config::DsiLanes

DSI supported lanes1, 2, 3, 4.

◆ DsiPixel

u8 XDsi_Config::DsiPixel

Pixels per beat receive on input stream.