dp
Xilinx SDK Drivers API Documentation
XDp_Config Struct Reference

This typedef contains configuration information for the DisplayPort core. More...

Data Fields

u16 DeviceId
 Device instance ID. More...
 
UINTPTR BaseAddr
 The base address of the core instance. More...
 
u32 SAxiClkHz
 The clock frequency of the core instance's S_AXI_ACLK port. More...
 
u8 MaxLaneCount
 The maximum lane count supported by this core instance. More...
 
u8 MaxLinkRate
 The maximum link rate supported by this core instance. More...
 
u8 MaxBitsPerColor
 The maximum bits/color supported by this core instance. More...
 
u8 QuadPixelEn
 Quad pixel support by this core instance. More...
 
u8 DualPixelEn
 Dual pixel support by this core instance. More...
 
u8 YCrCbEn
 YCrCb format support by this core instance. More...
 
u8 YOnlyEn
 YOnly format support by this core instance. More...
 
u8 PayloadDataWidth
 The payload data width used by this core instance. More...
 
u8 SecondaryChEn
 This core instance supports audio packets being sent by the secondary channel. More...
 
u8 NumAudioChs
 The number of audio channels supported by this core instance. More...
 
u8 MstSupport
 Multi-stream transport (MST) mode is enabled by this core instance. More...
 
u8 NumMstStreams
 The total number of MST streams supported by this core instance. More...
 
u8 DpProtocol
 The DisplayPort protocol version that this core instance is configured for. More...
 
u8 IsRx
 The type of DisplayPort core. More...
 

Detailed Description

This typedef contains configuration information for the DisplayPort core.

Field Documentation

◆ BaseAddr

UINTPTR XDp_Config::BaseAddr

The base address of the core instance.

Referenced by Dp_SelfTestExample(), Dptx_SetupExample(), XDp_CfgInitialize(), and XDp_IsLaneCountValid().

◆ DeviceId

u16 XDp_Config::DeviceId

Device instance ID.

◆ DpProtocol

u8 XDp_Config::DpProtocol

The DisplayPort protocol version that this core instance is configured for.

0 = v1.1a, 1 = v1.2, 2 = v1.4.

Referenced by XDp_IsLaneCountValid().

◆ DualPixelEn

u8 XDp_Config::DualPixelEn

Dual pixel support by this core instance.

◆ IsRx

u8 XDp_Config::IsRx

The type of DisplayPort core.

0 = TX, 1 = RX.

◆ MaxBitsPerColor

u8 XDp_Config::MaxBitsPerColor

The maximum bits/color supported by this core instance.

◆ MaxLaneCount

u8 XDp_Config::MaxLaneCount

The maximum lane count supported by this core instance.

Referenced by XDp_IsLaneCountValid().

◆ MaxLinkRate

u8 XDp_Config::MaxLinkRate

The maximum link rate supported by this core instance.

Referenced by XDp_IsLaneCountValid(), and XDp_IsLinkRateValid().

◆ MstSupport

u8 XDp_Config::MstSupport

Multi-stream transport (MST) mode is enabled by this core instance.

◆ NumAudioChs

u8 XDp_Config::NumAudioChs

The number of audio channels supported by this core instance.

◆ NumMstStreams

u8 XDp_Config::NumMstStreams

The total number of MST streams supported by this core instance.

◆ PayloadDataWidth

u8 XDp_Config::PayloadDataWidth

The payload data width used by this core instance.

◆ QuadPixelEn

u8 XDp_Config::QuadPixelEn

Quad pixel support by this core instance.

◆ SAxiClkHz

u32 XDp_Config::SAxiClkHz

The clock frequency of the core instance's S_AXI_ACLK port.

Referenced by XDp_IsLaneCountValid().

◆ SecondaryChEn

u8 XDp_Config::SecondaryChEn

This core instance supports audio packets being sent by the secondary channel.

◆ YCrCbEn

u8 XDp_Config::YCrCbEn

YCrCb format support by this core instance.

◆ YOnlyEn

u8 XDp_Config::YOnlyEn

YOnly format support by this core instance.